參數(shù)資料
型號(hào): DAC7741Y
英文描述: 16-Bit, Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
中文描述: 16位,單通道數(shù)字到模擬轉(zhuǎn)換器,具有內(nèi)部參考和并行接口
文件頁數(shù): 6/20頁
文件大?。?/td> 421K
代理商: DAC7741Y
DAC7741
SBAS248A
6
www.ti.com
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNITS
t
RCS
t
RDS
t
RDH
t
DZ
t
CSD
t
WCS
t
WS
t
WH
t
LS
t
LH
t
LX
t
DS
t
DH
t
LWD
t
SS
t
SH
t
RSS
t
S
CS LOW for Read
R/W HIGH to CS LOW
R/W HIGH after CS HIGH
CS HIGH to Data Bus High Impedance
CS LOW to Data Bus Valid
CS LOW for Write
R/W LOW to CS LOW
R/W LOW after CS HIGH
CS LOW to LDAC HIGH
CS LOW after LDAC HIGH
LDAC HIGH
Data Valid to CS LOW
Data Valid after CS HIGH
LDAC LOW
RSTSEL Valid Before RST LOW
RSTSEL Valid After RST HIGH
RST LOW
Voltage Output Settling Time
100
10
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
70
100
85
30
10
10
40
0
30
0
20
40
0
10
30
5
TIMING CHARACTERISTICS
DAC7741Y
TIMING DIAGRAMS
RESET TIMING
Data In
DB15-DB0
t
DS
t
LS
t
LH
t
S
t
LX
t
WH
t
LWD
t
DH
t
WS
t
WCS
Data Valid
CS
R/W
LDAC
V
OUT
±
0.003% of FSR
Error Bands
t
RCS
t
RDS
t
RDH
t
CSD
t
DZ
Data Valid
Data Out
DB15-DB0
R/W
CS
RSTSEL
(RSTSEL = LOW)
(RSTSEL = HIGH)
RST
V
OUT
V
OUT
t
SS
t
SH
t
RSS
t
S
+FS
+FS
FS
FS
Min-Scale
Mid-Scale
WRITE CYCLE
READ CYCLE
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