
2
DAC714
SPECIFICATIONS
At T
A
= +25
°
C, +V
CC
= +12V and +15V, –V
CC
= –12V, and –15V, unless otherwise noted.
Binary Two’s Complement
(V
CC
–1.4)
+0.8
±
10
±
10
DAC714P, U
DAC714HB
DAC714HC
DAC714HL
PARAMETER
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
TRANSFER CHARACTERISTICS
ACCURACY
Linearity Error
T
to T
Differential Linearity Error
T
to T
Monotonicity
Monotonicity Over Spec Temp Range
Gain Error
(3)
T
to T
Unipolar/Bipolar Zero Error
(3)
T
MIN
to T
MAX
Power Supply Sensitivity of Gain
±
4
±
8
±
4
±
8
±
2
±
4
±
2
±
4
±
1
±
2
±
1
±
2
±
1
±
2
±
1
±
1
LSB
LSB
LSB
LSB
Bits
Bits
%
%
14
13
15
14
16
15
16
16
±
0.1
±
0.25
±
0.1
±
0.2
±
0.003
±
30
±
0.1
±
0.25
±
0.1
±
0.2
±
0.003
±
30
±
0.1
±
0.25
±
0.1
±
0.2
±
0.003
±
30
±
0.1
±
0.25
±
0.1
±
0.2
±
0.003
±
30
% of FSR
(2)
% of FSR
%FSR/%V
CC
ppm FSR/%V
CC
DYNAMIC PERFORMANCE
Settling Time
(to
±
0.003%FSR, 5k
|| 500pF Load)
(4)
20V Output Step
1LSB Output Step
(5)
Output Slew Rate
Total Harmonic Distortion
0dB, 1001Hz, f
S
= 100kHz
–20dB, 1001Hz, f
S
= 100kHz
–60dB, 1001Hz, f
S
= 100kHz
SINAD: 1001Hz, f
S
= 100kHz
Digital Feedthrough
(5)
Digital-to-Analog Glitch Impulse
(5)
Output Noise Voltage (includes reference)
ANALOG OUTPUT
Output Voltage Range
+V
, –V
=
±
11.4V
Output Current
Output Impedance
Short Circuit to ACOM Duration
REFERENCE VOLTAGE
Voltage
T
to T
Output Resistance
Source Current
Short Circuit to ACOM Duration
INTERFACE
RESOLUTION
DIGITAL INPUTS
Serial Data Input Code
Logic Levels
(1)
V
IH
V
IL
I
IH
(V
I
= +2.7V)
I
IL
(V
I
= +0.4V)
DIGITAL OUTPUT
Serial Data
V
OL
(I
SINK
= 1.6mA)
V
OH
(I
SOURCE
= 500
μ
A), T
MIN
to T
MAX
POWER SUPPLY REQUIREMENTS
Voltage
+V
CC
–V
CC
Current (No Load,
±
15V Supplies)
(6)
+V
CC
–V
Power Dissipation
(7)
TEMPERATURE RANGES
Specification
All Grades
Storage
Thermal Coefficient,
θ
JA
NOTES: (1) Digital inputs are TTL and +5V CMOS compatible over the specification temperature range. (2) FSR means Full Scale Range. For example, for
±
10V output, FSR = 20V. (3) Errors
externally adjustable to zero. (4) Maximum represents the 3
σ
limit. Not 100% tested for this parameter. (5) For the worst-case Binary Two’s Complement code changes: FFFF
to 0000
and 0000
H
to FFFF
H
. (6) During power supply turn on, the transient supply current may approach 3x the maximum quiescent specification. (7) Typical (i.e. rated) supply voltages times maximum currents.
6
4
10
6
4
10
6
4
10
6
4
10
μ
s
μ
s
V/
μ
s
10
10
10
10
0.005
0.03
3.0
87
2
15
120
0.005
0.03
3.0
87
2
15
120
0.005
0.03
3.0
87
2
15
120
0.005
0.03
3.0
87
2
15
120
%
%
%
dB
nV–s
nV–s
nV/
√
Hz
±
10
±
5
±
10
±
5
±
10
±
5
±
10
±
5
V
mA
0.1
0.1
0.1
0.1
Indefinite
Indefinite
Indefinite
Indefinite
+9.975
+9.960
+10.000
+10.025
+10.040
+9.975
+9.960
+10.000
+10.025
+10.040
+9.975
+9.960
+10.000
+10.025
+10.040
+9.975
+9.960
+10.000
+10.025
+10.040
V
V
mA
1
1
1
1
2
2
2
2
Indefinite
Indefinite
Indefinite
Indefinite
16
16
16
16
Bits
+2.0
0
(V
CC
–1.4)
+0.8
±
10
±
10
+2.0
0
+2.0
0
(V
CC
–1.4)
+0.8
±
10
±
10
+2.0
0
(V
CC
–1.4)
+0.8
±
10
±
10
V
V
μ
A
μ
A
0
+0.4
+5
0
+0.4
+5
0
+0.4
+5
0
+0.4
+5
V
V
+2.4
+2.4
+2.4
+2.4
+11.4
–11.4
+15
–15
+16.5
–16.5
+11.4
–11.4
+15
–15
+16.5
–16.5
+11.4
–11.4
+15
–15
+16.5
–16.5
+11.4
–11.4
+15
–15
+16.5
–16.5
V
V
13
22
16
26
625
13
22
16
26
625
13
22
16
26
625
13
22
16
26
625
mA
mA
mW
–40
–60
+85
+150
–40
–60
+85
+150
–40
–60
+85
+150
0
+70
+150
°
C
°
C
–60
75
75
75
75
°
C/W