
DAC312
–10–
REV. C
APPLICAT IONS INFORMAT ION
RE FE RE NCE AMPLIFIE R SE T UP
T he DAC312 is a multiplying D/A converter in which the out-
put current is the product of a digital number and the input ref-
erence current. T he reference current may be fixed or may vary
from nearly zero to +1.0 mA. T he full range output current is a
linear function of the reference current and is given by:
I
FR
=
4095
4096
×
4
×
(I
REF
) = 3.999 I
REF
,
where I
REF
= I
14
In positive reference applications, an external positive reference
voltage forces current through R14 into the V
REF(+)
terminal
(pin 14) of the reference amplifier. Alternatively, a negative ref-
erence may be applied to V
REF(–)
at pin 15. Reference current
flows from ground through R14 into V
REF(+)
as in the positive
reference case. T his negative reference connection has the ad-
vantage of a very high impedance presented at pin 15. T he volt-
age at pin 14 is equal to and tracks the voltage at pin 15 due to
the high gain of the internal reference amplifier. R15 (nominally
equal to R14) is used to cancel bias current errors.
Bipolar references may be accommodated by offsetting V
REF
or
pin 15. T he negative common-mode range of the reference am-
plifier is given by: V
CM
–
= V– plus (I
REF
×
3 k
) plus 1.23 V.
T he positive common-mode range is V+ less 1.8 V.
When a dc reference is used, a reference bypass capacitor is rec-
ommended. A 5.0 V T T L logic supply is not recommended as a
reference. If a regulated power supply is used as a reference,
R14 should be split into two resistors with the junction bypassed
to ground with a 0.1
μ
F capacitor.
For most applications the tight relationship between I
REF
and I
FS
will eliminate the need for trimming I
REF
. If required, full scale
trimming may be accomplished by adjusting the value of R14,
or by using a potentiometer for R14. An improved method of
full-scale trimming which eliminates potentiometer T .C. effects
is shown in the Recommended Full-Scale Adjustment circuit.
T he reference amplifier must be compensated by using a capaci-
tor from pin 16 to V–. For fixed reference operation, a 0.01
μ
F
capacitor is recommended. For variable reference applications,
see section entitled “Reference Amplifier Compensation for
Multiplying Applications.”
MULT IPLY ING OPE RAT ION
T he DAC312 provides excellent multiplying performance with
an extremely linear relationship between I
FS
and I
REF
over a
range of 1 mA to 1
μ
A. Monotonic operation is maintained over
a typical range of I
REF
from 100
μ
A to 1.0 mA. Although some
degradation of gain accuracy will be realized at reduced values
of I
REF
. (See Gain Accuracy vs. Reference Current).
RE FE RE NCE AMPLIFIE R COMPE NSAT ION FOR
MULT IPLY ING APPLICAT IONS
AC reference applications will require the reference amplifier to
be compensated using a capacitor from pin 16 to V–. T he value
of this capacitor depends on the impedance presented to pin 14
for R14 values of 1.0
, 2.5
and 5.0 k
, minimum values of
C
C
are 5 pF, 10 pF, and 25 pF. Larger values of R14 require
proportionately increased values of C
C
for proper phase margin.
For fastest response to a pulse, low values of R14 enabling small
C
C
values should be used. If pin 14 is driven by a high imped-
ance such as a transistor current source, none of the above val-
ues will suffice and the amplifier must be heavily compensated
which will decrease overall bandwidth and slew rate. For R14 =
1 k
and C
C
= 5 pF, the reference amplifier slews at 4 mA/
μ
s
enabling a transition from I
REF
= 0 to I
REF
= 1 mA in 250 ns.
Operation with pulse inputs to the reference amplifier may be
accommodated by an alternate compensation scheme. T his
technique provides lowest full-scale transition times. An internal
clamp allows quick recovery of the reference amplifier from a
cutoff (I
REF
= 0) condition. Full-scale transition (0 mA to 1 mA)
occurs in 62.5 ns when the equivalent impedance at pin 14 is
800
and C
C
= 0. T his yields a reference slew rate of 8 mA/
μ
s
which is relatively independent of R
IN
and V
IN
values.
LOGIC INPUT S
T he DAC312 design incorporates a unique logic input circuit
which enables direct interface to all popular logic families and
provides maximum noise immunity. T his feature is made pos-
sible by the large input swing capability, 40
μ
A logic input cur-
rent, and completely adjustable logic threshold voltage. For V–
= –15 V, the logic inputs may swing between –5 V and +10 V.
T his enables direct interface with +15 V CMOS logic, even
when the DAC312 is powered from a +5 V supply. Minimum
input logic swing and minimum logic threshold voltage are given
by: V– plus (I
REF
×
3 k
) plus 1.8 V. T he logic threshold may
be adjusted over a wide range by placing an appropriate voltage
at the logic threshold control pin (pin 13, V
LC
). T he appropriate
graph shows the relationship between V
LC
and V
T H
over the
temperature range, with V
T H
nominally 1.4 above V
LC
. For
T T L interface, simply ground pin 13. When interfacing ECL,
an I
REF
≤
1 mA is recommended. For interfacing other logic
families, see block titled “Interfacing With Various Logic Fami-
lies”. For general setup of the logic control circuit, it should be
noted that pin 13 will sink 7 mA typical; external circuitry
should be designed to accommodate this current.