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參數(shù)資料
| 型號： | DAC0415X |
| 英文描述： | DAC0415X 16/20/24Bit 32/44.1/48kHz Sigma-Delta Stereo DAC DAC0415X|Data Sheet |
| 中文描述： | DAC0415X 16/20/24Bit 32/44.1/48kHzΣ-Δ立體聲DAC DAC0415X |數(shù)據(jù)資料 |
| 文件頁數(shù)： | 1/19頁 |
| 文件大?。?/td> | 145K |
| 代理商： | DAC0415X |
SEC ASIC
DAC0415X
DAC0415X
16/20/24Bit 44.1/32/48kHz Sigma-Delta Stereo DAC
16/20/24Bit 32/44.1/48kHz Sigma-Delta Stereo DAC
ANALOG
General Description
This
product
Converter for High grade Digital Audio Applications.
The
product
contains
Serial-to-Parallel
Converter and Compensation Filter, Digital Volume
Attenuator by the
Mode Interface, De-Emphasis
Filter, FIR filter, Sinc Filter, Digital Sigma-Delta
Modulator, Analog Postfilter, AIF (Anti-Image-Filter).
The normal input and output channels provides
95dB SNR (Signal to Noise Ratio) over in band
(20kHz : Sampling Rate = 44.1KHz).
The
product
employs
Sigma-Delta architecture with 16bit resolution, over
sampling of 64X. And Analog Postfilter with low
clock
sensitivity
and
Linear
Shaping-Nosie
and
outputs Analog
high resolution. An on-chip reference voltage is
included to allow single supply operations.
is
Sigma-Delta
Digital-To-Analog
Interface
the
1bit
4th-order
phase,
filters
voltage
the
with
Features
-16/20/24bit Sigma-Delta Digital
-to-
Analog Converter
-Sampling Frequency Rate 32/44.1/48KHz
-Input Rate 1Fs or 2Fs by Normal Mode/Double
Mode Selection
-On-Chip Compensation Filter
-On-Chip 4 times Oversampling Digital Filter
-On-Chip Analog Postfilter
-Filtered Line-Level Outputs, Linear Phase Filtering
-On-Chip Voltage Reference
-Low Clock Jitter Sensitivity
-96dB SNR
-L/R Independent Digital Soft Attenuation
-On-Chip De-Emphasis Filter (32/44.1/48KHz)
-Zero Input Detection Mute
-Soft Mute Control
-Mono/Stereo Setting
-Single 1.8V / 3.3V(Digital/Analog) Power Supply
Applications
CD Player, CD-ROM, MP3 Player, Video-CD,
Mini-Disk, DVD etc
Block Diagram
DAC
&
Analog
Postfilter
Sinc Filter
&
Sigma-Delta
Modulator
Compensation
Filter
&
De-emphsis
&
FIR Filter
Anti-Imaging
Filter
Test Mode Interface
Voltage
Reference
S/P
Converter
&
Attenuator
MSCK
BCK
LRCK
SDATA
ZDENH
AOUTL
VCOMML(I)*
VCOMCL(I)*
VCOML(I)*
VREFML(I)*
VREFPL(I)*
VHALF(O)*
VREFIN(I)*
VREF(O)*
VREFPR(I)*
VREFMR(I)*
VCOMR(I)*
VCOMCR(I)*
VCOMMR(I)*
AOUTR
I
D
N
U
M
<
3
:
0
P
D
L
R
S
T
B
Z
D
E
N
L
M
U
T
E
L
I
F
S
I
I
S
D
N
M
L
D
F
S
0
M
D
A
F
S
1
M
C
K
D
E
M
M
O
D
E
Mode Interface & Timing Control
I
R
E
F
B
*
I
A
D
S
R
I
A
D
S
L
I
F
S
6
4
O
D
S
R
O
D
S
L
O
F
S
6
4
T
S
E
L
S
E
R
R
O
R
B
S
D
I
A
G
B
I
S
T
O
N
P
AVDD18D AVSS18D
AVDD33A AVSS33A
(I)* : Input
(O)* : Output
(B)* : Bidirection
Ver 4.0
(Dec 2001)
This data sheet is a preliminary version. No responsibility is assumed by SEC for its
use nor for any infringements of patents or other rights of third parties that may result from its use. The
content of this data sheet is subject to change without any notice.
1/17
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