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參數(shù)資料
| 型號： | D602 |
| 廠商： | SiGe Semiconductor, Inc. |
| 英文描述： | 3V, 6GHz Divide-by-2 Static Prescaler Final |
| 中文描述： | 3V的，6GHz的分頻2靜態(tài)分頻器決賽 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 307K |
| 代理商： | D602 |
D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Electrical Characteristics
Conditions: V
CC
= 3.0V, -40°C < T
A
< 85°C unless otherwise specified
Symbol
Parameter
Note
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
2.7
3.0
4.0
V
T
A
Operating Temperature
1
-40
25
85
°C
I
CC
Supply Current
14
18
mA
I
CC – PWDN
Power-Down Supply Current
(V
PWD
= High)
0.2
1.0
μA
f
In(U)
Upper Limit of Input Frequency
2
5.8
6.4
GHz
f
In(L)
Lower Limit of Input Frequency
2
0.6
1.0
GHz
f
Osc
Self Oscillation Output Frequency
3
1.0
GHz
P
In(U)
Upper Limit of Input Power
0
3
dBm
P
In(L)
Lower Limit of Input Power
-20
-10
dBm
P
Out
Output Power
4
-15.0
0
dBm
V
IH
High-Level PWD Input Voltage
V
CC
- 0.2
V
V
IL
Low-Level PWD Input Voltage
0.2
V
I
IH
High-Level PWD Input Current
-100.0
100.0
nA
I
IL
Low-Level PWD Input Current
-100.0
100.0
nA
PN
Residual Phase Noise at 1kHz offset from
a 2.5GHz (f
Out
) carrier
-141
dBc/Hz
Notes:
(1) Sample Tested
(2) For a sine-wave input
(3) Since the input signal is AC coupled, in the absence of an RF input, the prescaler may self oscillate and
provide an output at this frequency. Self oscillation can be eliminated by powering down the prescaler,
or applying a differential DC input voltage (a 47k
resistor placed between pin 3 and V
CC
).
(4) This power is delivered to a 50
load. It excludes the power dissipated in the external pull-up resistors.
Test Circuit
D602
1
2
3
4
8
7
6
5
100p
100n
V
CC
1p
1n
51
51
1n
1n
Signal
Generator
50 Ohm
Measurement
Equipment
100p
100n
20-DST-01
Rev 5.0
Sept/01
3 of 8
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