參數(shù)資料
型號(hào)： CYWUSB6932
廠商： Cypress Semiconductor Corp.
英文描述： Sound/Security Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Capacitance:30pF/ft RoHS Compliant: Yes
中文描述： 個(gè)WirelessUSB LS的2.4GHz直接序列擴(kuò)頻無(wú)線電芯片
文件頁(yè)數(shù)： 11/30頁(yè)
文件大?。?/td> 305K
代理商： CYWUSB6932
CYWUSB6932
CYWUSB6934
Document 38-16007 Rev. *G
Page 11 of 30
Addr: 0x07
REG_RX_INT_EN
Default: 0x00
7
6
5
4
3
2
1
0
Underflow B
Overflow B
EOF B
Figure 7-6. Receive SERDES Interrupt Enable
Full B
Underflow A
Overflow A
EOF A
Full A
Bit
7
Name
Underflow B
Description
The Underflow B bit is used to enable the interrupt associated with an underflow condition with the Receive SERDES
Data B register (Reg 0x0B)
1 = Underflow B interrupt enabled for Receive SERDES Data B
0 = Underflow B interrupt disabled for Receive SERDES Data B
An underflow condition occurs when attempting to read the Receive SERDES Data B register (Reg 0x0B) when it is
empty.
The Overflow B bit is used to enable the interrupt associated with an overflow condition with the Receive SERDES Data
B register (Reg 0x0B)
1 = Overflow B interrupt enabled for Receive SERDES Data B
0 = Overflow B interrupt disabled for Receive SERDES Data B
An overflow condition occurs when new received data is written into the Receive SERDES Data B register (Reg 0x0B)
before the prior data is read out.
The End of Frame B bit is used to enable the interrupt associated with the Channel B Receiver EOF condition.
1 = EOF B interrupt enabled for Channel B Receiver.
0 = EOF B interrupt disabled for Channel B Receiver.
The EOF IRQ asserts during an End of Frame condition. End of Frame conditions occur after at least one bit has been
detected, and then the number of invalid bits in the frame exceeds the number in the EOF length field. If 0 is the EOF
length, and EOF condition will occur at the first invalid bit after a valid reception. This IRQ is cleared by reading the
receive status register
The Full B bit is used to enable the interrupt associated with the Receive SERDES Data B register (Reg 0x0B) having
data placed in it.
1 = Full B interrupt enabled for Receive SERDES Data B
0 = Full B interrupt disabled for Receive SERDES Data B
A Full B condition occurs when data is transferred from the Channel B Receiver into the Receive SERDES Data B
register (Reg 0x0B). This could occur when a complete byte is received or when an EOF event occurs whether or not
a complete byte has been received.
The Underflow A bit is used to enable the interrupt associated with an underflow condition with the Receive SERDES
Data A register (Reg 0x09)
1 = Underflow A interrupt enabled for Receive SERDES Data A
0 = Underflow A interrupt disabled for Receive SERDES Data A
An underflow condition occurs when attempting to read the Receive SERDES Data A register (Reg 0x09) when it is
empty.
The Overflow A bit is used to enable the interrupt associated with an overflow condition with the Receive SERDES Data
A register (0x09)
1 = Overflow A interrupt enabled for Receive SERDES Data A
0 = Overflow A interrupt disabled for Receive SERDES Data A
An overflow condition occurs when new receive data is written into the Receive SERDES Data A register (Reg 0x09)
before the prior data is read out.
The End of Frame A bit is used to enable the interrupt associated with an End of Frame condition with the Channel A
Receiver.
1 = EOF A interrupt enabled for Channel A Receiver.
0 = EOF A interrupt disabled for Channel A Receiver.
The EOF IRQ asserts during an End of Frame condition. End of Frame conditions occur after at least one bit has been
detected, and then the number of invalid bits in a frame exceeds the number in the EOF length field. If 0 is the EOF
length, an EOF condition will occur at the first invalid bit after a valid reception. This IRQ is cleared by reading the receive
status register.
The Full A bit is used to enable the interrupt associated with the Receive SERDES Data A register (0x09) having data
written into it.
1 = Full A interrupt enabled for Receive SERDES Data A
0 = Full A interrupt disabled for Receive SERDES Data A
A Full A condition occurs when data is transferred from the Channel A Receiver into the Receive SERDES Data A
register (Reg 0x09). This could occur when a complete byte is received or when an EOF event occurs whether or not
a complete byte has been received.
6
Overflow B
5
EOF B
4
Full B
3
Underflow A
2
Overflow A
1
EOF A
0
Full A
相關(guān)PDF資料
PDF描述
CYWUSB6932-48LFXC Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Capacitance:30pF/ft; Conductor Material:Copper RoHS Compliant: Yes
CYWUSB6934 Sound/Security Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Conductor Material:Copper RoHS Compliant: Yes
CYWUSB6934-48LFXC Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Capacitance:30pF/ft; Conductor Material:Copper RoHS Compliant: Yes
CYWUSB6935-48LFXC WirelessUSB LRTM 2.4-GHz DSSS Radio SoC
CYWUSB6935-48LFXI WirelessUSB LRTM 2.4-GHz DSSS Radio SoC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYWUSB6932_05 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:WirelessUSB⑩ LS 2.4-GHz DSSS Radio SoC
CYWUSB6932-28SEC 功能描述:IC WIRELESS USB 2.4GHZ 28-SOIC RoHS:否 類別:RF/IF 和 RFID >> RF 收發(fā)器 系列:WirelessUSB™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:30 系列:- 頻率:4.9GHz ~ 5.9GHz 數(shù)據(jù)傳輸率 - 最大:54Mbps 調(diào)制或協(xié)議:* 應(yīng)用:* 功率 - 輸出:-3dBm 靈敏度:- 電源電壓:2.7 V ~ 3.6 V 電流 - 接收:* 電流 - 傳輸:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲(chǔ)容量:- 天線連接器:PCB，表面貼裝 工作溫度:-25°C ~ 85°C 封裝/外殼:68-TQFN 裸露焊盤 包裝:管件
CYWUSB6932-48LFXC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:WirelessUSB⑩ LS 2.4-GHz DSSS Radio SoC
CYWUSB6934 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:WirelessUSB LS 2.4-GHz DSSS Radio SoC
CYWUSB6934-28SEC 功能描述:IC WIRELESS USB 2.4GHZ 28-SOIC RoHS:否 類別:RF/IF 和 RFID >> RF 收發(fā)器 系列:WirelessUSB™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:30 系列:- 頻率:4.9GHz ~ 5.9GHz 數(shù)據(jù)傳輸率 - 最大:54Mbps 調(diào)制或協(xié)議:* 應(yīng)用:* 功率 - 輸出:-3dBm 靈敏度:- 電源電壓:2.7 V ~ 3.6 V 電流 - 接收:* 電流 - 傳輸:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲(chǔ)容量:- 天線連接器:PCB，表面貼裝 工作溫度:-25°C ~ 85°C 封裝/外殼:68-TQFN 裸露焊盤 包裝:管件
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*