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參數(shù)資料
| 型號： | CYW2325ZIT |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 217K |
| 代理商： | CYW2325ZIT |
Serial Input PLL with 1.2-GHz Prescaler
CYW2315
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
February 14, 2000, rev. **
Features
Operating voltage 2.7V to 5.5V
Operating frequency: up to 1.2 GHz with prescaler
ratios of 64/65 and 128/129
Lock detect feature
Power-down mode
20-pin TSSOP (Thin Shrink Small Outline Package)
Applications
Wireless LAN
Wireless communication handsets
Base Stations
Microcells
CYW2315 PLL Block Diagram
Pin Configuration
Phase
Detector
F
IN
Prescaler
64/65 or
128/129
Binary 7-Bit
Swallow Counter
(10)
Binary 11-Bit
Programmable Counter
Charge
Pump
18-Bit
Latch
15-Bit
Latch
14-Bit
Reference Counter
Divider
Output
(fr/fp)
MUX
Latch
Selector
Cntrl 19-Bit
Shift
Reg
OSC_IN
(1)
OSC_OUT(3)
LE
(14)
DATA
(13)
CLOCK
(11)
F
OUT
(17)
LD
(8)
p
(18)
PWDN(19)
DO
(6)
FC
r
(15)
BISW
(16)
(20)
fr
fp
V
P
(4)
V
CC
(5)
GND (7)
r
PWDN
p
F
out
BISW
FC
LE
DATA
NC
CLOCK
20
19
18
17
16
15
14
13
12
11
OSC_IN
NC
OSC_OUT
V
P
V
CC
D
O
GND
LD
NC
F
IN
1
2
3
4
5
6
7
8
9
10
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