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參數(shù)資料
| 型號： | CYP15G0403DXB-BGXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Independent Clock Quad HOTLink II⑩ Transceiver |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, 1.57 MM HEIGHT, LEAD FREE, BGA-256 |
| 文件頁數(shù)： | 11/45頁 |
| 文件大?。?/td> | 517K |
| 代理商： | CYP15G0403DXB-BGXC |
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CYP15G0403DXB
CYV15G0403DXB
CYW15G0403DXB
Document #: 38-02065 Rev. *F
Page 11 of 45
LFIA
LFIB
LFIC
LFID
LVTTL Output,
asynchronous
Link Fault Indication Output
. LFIx is an output status indicator signal. LFIx is the
logical OR of six internal conditions. LFIx is asserted LOW when any of the following
conditions is true:
Received serial data rate outside expected range
Analog amplitude below expected levels
Transition density lower than expected
Receive channel disabled
ULCx is LOW
Absence of REFCLKx±.
Device Configuration and Control Bus Signals
WREN
LVTTL input,
asynchronous,
internal pull-up
Control Write Enable
. The WREN input writes the values of the DATA[7:0] bus into
the latch specified by the address location on the ADDR[3:0] bus.
[5]
ADDR[3:0]
LVTTL input
asynchronous,
internal pull-up
Control Addressing Bus
. The ADDR[3:0] bus is the input address bus used to
configure the device. The WREN input writes the values of the DATA[7:0] bus into the
latch specified by the address location on the ADDR[3:0] bus.
[5]
Table 9 on page 20
lists the configuration latches within the device, and the initialization value of the
latches upon the assertion of RESET.
Table 10 on page 24
shows how the latches
are mapped in the device.
DATA[7:0]
LVTTL input
asynchronous,
internal pull-up
Control Data Bus
. The DATA[7:0] bus is the input data bus used to configure the
device. The WREN input writes the values of the DATA[7:0] bus into the latch
specified by address location on the ADDR[3:0] bus.
[5 ]
Table 9
lists the configuration
latches within the device, and the initialization value of the latches upon the assertion
of RESET.
Table 10
shows how the latches are mapped in the device.
Internal Device Configuration Latches
RFMODE[A..D][1:0] Internal Latch
[6]
FRAMCHAR[A..D] Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
SDASEL[A..D][1:0] Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Internal Latch
[6]
Reframe Mode Select
.
Framing Character Select
.
DECMODE[A..D]
Receiver Decoder Mode Select
.
DECBYP[A..D]
Receiver Decoder Bypass
.
RXCKSEL[A..D]
Receive Clock Select
.
RXRATE[A..D]
Receive Clock Rate Select
.
Signal Detect Amplitude Select
.
ENCBYP[A..D]
Transmit Encoder Bypassed
.
TXCKSEL[A..D]
Transmit Clock Select
.
TXRATE[A..D]
Transmit PLL Clock Rate Select
.
RFEN[A..D]
Reframe Enable
.
RXPLLPD[A..D]
Receive Channel Power Control
.
RXBIST[A..D]
Receive Bist Disabled
.
TXBIST[A..D]
Transmit Bist Disabled
.
OE2[A..D]
Differential Serial Output Driver 2 Enable
.
OE1[A..D]
Differential Serial Output Driver 1 Enable
.
Notes
5. See
“Device Configuration and Control Interface” on page 20
for detailed information on the operation of the Configuration Interface.
6. See
“Device Configuration and Control Interface” on page 20
for detailed information on the internal latches.
Pin Descriptions
(continued)
CYP(V)(W)15G0403DXB Quad HOTLink II Transceiver
Name
I/O Characteristics
Signal Description
[+] Feedback
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| CYP15G0403DXB-BGXI | 功能描述:電信線路管理 IC Ind. Clock Quad HOTLink II Xcvr RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYP15G04K100V1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Physical Layer Devices |
| CYP7C1048AC | 制造商:Cypress Semiconductor 功能描述: |
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| CYPD1103-35FNXIT | 功能描述:IC MCU 32BIT 32KB FLASH 35WLCSP 制造商:cypress semiconductor corp 系列:EZ-PD? CCG1 包裝:剪切帶（CT） 零件狀態(tài):停產(chǎn) 應用:USB Type C 核心處理器:ARM? Cortex?-M0 程序存儲器類型:閃存（32 kB） 控制器系列:- RAM 容量:4K x 8 接口:I2C，SPI，UART/USART，USB I/O 數(shù):31 電壓 - 電源:1.71 V ~ 5.5 V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:* 封裝/外殼:35-UFBGA，WLCSP 供應商器件封裝:35-WLCSP（3.23x2.10） 標準包裝:1 |
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