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| 型號： | CYNPC80192-BGC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Network Database Coprocessor |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA388 |
| 封裝： | BGA-388 |
| 文件頁數(shù)： | 28/42頁 |
| 文件大?。?/td> | 305K |
| 代理商： | CYNPC80192-BGC |
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CYNCP80192
Document #: 38-02043 Rev. *B
Page 28 of 42
13.0
Application Information
There are two ways to build a database coprocessing subsystem using CYNPC80192, CYNSE70XXX, and SSRAMs. In the first
system the associative data SSRAMs are connected to the coprocessor and the NSE (
Figure 13-1
) and the coprocessor returns
the associated data in response to a search operation. This type of implementation is suited to applications where the associative
data size is up to eight bytes.
In the second system, the coprocessor returns the index of the successful search entry. The network processor uses the index
as the page offset to access the associative data from SSRAM directly (see
Figure 13-2
). This implementation is suited to
applications where the associative data size is longer than eight bytes.
Single or multiple network processors with the arbitration to the SRAM interface can access the database coprocessing
subsystem to implement a parallel packet processing system, as shown in
Figure 13-3
.
Coprocessor
Bank
SSRAM
Bank
NSE
Figure 13-1. Configuration 1—Associative SSRAM Mode
Coprocessor
SSRAM
Bank
Bank
NSE
Figure 13-2. Configuration 2—Index Mode
Network
Processors
Network
Processors
Coprocessors
SSRAMs
Figure 13-3. Switching Systems Block Diagram
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