參數(shù)資料
型號(hào): CYII4SD1300AA-QAC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 圖像傳感器
英文描述: 1.3 MPxl Rolling Shutter CMOS Image Sensor
中文描述: IMAGE SENSOR-CMOS, 1280(H) X 1024(V) PIXEL, 23fps, 1-4.50V, SQUARE, SURFACE MOUNT
封裝: 0.71 MM HEIGHT, 0.04 INCH PITCH, CERAMIC, LCC-84
文件頁(yè)數(shù): 31/37頁(yè)
文件大小: 1168K
代理商: CYII4SD1300AA-QAC
IBIS4-1300
Document Number: 38-05707 Rev. *B
Page 31 of 37
Bonding pad geometry for the IBIS4-1300
The 84 pins are distributed evenly around the perimeter of
the Chip. At each edge there are 21 pins. Pin 1 is (in this
drawing) in the middle of the left edge.
The opening in the bonding pads (the useful area for
bonding) is 200 x 150 um.
The centers of the bonding pads are at all four edges at 150
um distance from the nominal chip border.
The scribe line (=the spacing between the nominal borders
of neighboring chips) is 250 um.
The bonding pad pitch is 437 um in X-direction
The bonding pad pitch in Y-direction is 393 um
62
clk_adc
D
I
ADC Clock
Converts on falling edge
63
tri_adc
D
I
ADC output tristate control
1=tristate; 0=output
64
pbiasdig1
A
I
100K to GND and decouple to VDD
current bias for comparator after encoder
65
pbiasencload
A
I
100K to GND and decouple to VDD
current bias for encoder
66
pbiasdig2
A
I
100K to GND and decouple to VDD
current bias for digital logic in columns
67
nonlinear
D
I
high active (1 = non-linear conversion) control for non-linear behavior of sensor
68
n.c.
not connected
69
nbiasana2
A
I
100K to VDD and decouple to GND
bias current 2nd comparator stage
70
nbiasana
A
I
100K to VDD and decouple to GND
bias current 1st comparator stage
71
vlow_adc
A
I
+ 2 V DC, +-2 K between P71 and P61 Low ADC reference voltage
72
gnd_an
A
G
ADC ground of analog circuits
73
in_adc
A
I
Converts between vlow and vhigh
(2-4V)
ADC input
74
vdd_an
A
P
+ 5 V DC
ADC analog power supply
75
gnd_dig
D
G
ADC ground of digital circuits
76
vdd_dig
D
P
+ 5 V DC
ADC digital power supply
77
vdd
A
P
+ 5 V DC
78
gnd
A
G
79
vdd_resetr
A
P
5 V DC default
(5.5 for large signal swing)
Power supply for reset by right (readout)
shift register
80
L/R\
D
I
1=left; 0=right
Selects left or right shift register for 'select'
and 'reset'
81
Pixel diode
A
O
groups current of 24 x 18 pixels
Test structure for spectral response
measurement of pixels
82
Photodiode
A
O
168x126 um2 (eq. 24 x 18 pixels)
Test structure for spectral response
measurement of photodiode
83
clip
A
I
Clips if output > 'clip' - Vth (PMOS)
Clipping voltage for output amplifier
84
subsmpl
D
I
high active, 1 = subsampling
Selects viewfinder mode (1:4 = 320 x 256)
No.
Name
Type
I/O
Description
Signal
[+] Feedback
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