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參數(shù)資料
| 型號： | CY9C6264-70SI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 存儲器 |
| 英文描述： | 8K x 8 Magnetic Nonvolatile CMOS RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PDSO28 |
| 封裝： | 0.300 INCH, SOIC-28 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 377K |
| 代理商： | CY9C6264-70SI |
PRELIMINARY
CY9C6264
Document#: 38-15003 Rev. *D
Page 4 of 12
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65
°
C to +150
°
C
Ambient Temperature with
Power Applied...............................................–40
°
C to +85
°
C
Supply Voltage to Ground Potential
(Pin 28 to Pin 14)...........................................–0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State
[1]
....................................–0.5V to V
CC
+ 0.5V
DC Input Voltage
[1]
.................................–0.5V to V
CC
+ 0.5V
except in case of super voltage pin (A7) while accessing 16
device ID and silicon signature bytes.
...
0.5V to V
CC
+ 2.5V
Electrical Characteristics
Over the Operating Range
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Maximum Exposure to Magnetic Field
@ Device Package
[2, 3]
............................................ < 20 Oe
Operating Range
Range
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
Commercial
Industrial
5V
±
10%
5V
±
10%
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX[4]
I
OZ
I
CC
I
SB1
Description
Test Conditions
CY9C62256-70
Min.
Typ.
[5]
2.4
Unit
V
V
V
V
μ
A
μ
A
mA
μ
A
Max.
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current
Output Leakage Current
V
CC
Operating Supply Current V
CC
= Max., I
OUT
= 0 mA, f = f
MAX
= 1/t
RC
Automatic CE Power-down
Current— TTL Inputs
V
IN
> V
IH
or V
IN
< V
IL
, f = f
MAX
Automatic CE Power-down
Current— CMOS Inputs
CE
1
> V
CC
0.3V or CE
2
< 0.3V
V
IN
> V
CC
0.3V or V
IN
< 0.3V, f = 0
V
CC
= Min., I
OH
=
1.0 mA
V
CC
= Min., I
OL
= 2.1 mA
0.4
2.2
V
CC
+ 0.5V
0.8
+0.5
+0.5
60
500
0.5
[1]
0.5
0.5
GND < V
I
< V
CC
GND < V
O
< V
CC
, Output Disabled
Max. V
CC
, CE
1
> V
IH
or CE
2
< V
IL
I
SB2
Max. V
CC
,
90
μ
A
Capacitance
[6]
Parameter
C
IN
C
OUT
Description
Test Conditions
T
A
= 25
°
C, f = 1 MHz,
V
CC
= 5.0V
Max.
6
8
Unit
pF
pF
Input Capacitance
Output Capacitance
AC Test Loads and Waveforms
Notes:
1. V
(min) = –2.0V for pulse duration of 20 ns.
2. Magnetic field exposure is highly dependent on the distance from the magnetic field source. The magnetic field falls of as 1/R squared, where R is the distance
from the magnetic source.
3. Exposure beyond this level may cause loss of data.
4. I
during access to 16 device ID and silicon signature bytes w/ super voltage pin at V
CC
+ 2.0V will be 100
μ
A max., V
IL
(min.) = –2.0V for pulse duration of less
than 20 ns.
5. Typical specifications are the mean values measured over a large sample size across normal production process variations and are taken at nominal conditions
(T
= 25°C, V
). Parameters are guaranteed by design and characterization and not 100% tested.
6. Tested initially and after any design or process changes that may affect these parameters.
3.0V
5V
OUTPUT
R1 1800
R2
990
100 pF
INCLUDING
JIG AND
SCOPE
Equivalent to:
GND
90%
10%
90%
10%
< 5 ns
< 5 ns
5V
OUTPUT
R1 1800
R2
990
5 pF
INCLUDING
JIG AND
SCOPE
(a)
THEVENIN EQUIVALENT
639
(b)
OUTPUT
1.77V
ALL INPUT PULSES
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