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參數(shù)資料
| 型號： | CY8C29866-24AXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Mixed Signal Array |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP100 |
| 封裝： | LEAD FREE, MS-026, TQFP-100 |
| 文件頁數(shù)： | 2/40頁 |
| 文件大?。?/td> | 474K |
| 代理商： | CY8C29866-24AXI |
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August 3, 2004
Document No. 38-12013 Rev. *F
2
CY8C29x66 Preliminary Data Sheet
PSoC Overview
tors, to simplify programming of real time embedded events.
Program execution is timed and protected using the included
Sleep and Watch Dog Timers (WDT).
Memory encompasses 32 KB of Flash for program storage, 2
KB of SRAM for data storage, and up to 2 KB of EEPROM emu-
lated using the Flash. Program Flash utilizes four protection lev-
els on blocks of 64 bytes, allowing customized software IP
protection.
The PSoC device incorporates flexible internal clock genera-
tors, including a 24 MHz IMO (internal main oscillator) accurate
to 2.5% over temperature and voltage. The 24 MHz IMO can
also be doubled to 48 MHz for use by the digital system. A low
power 32 kHz ILO (internal low speed oscillator) is provided for
the Sleep timer and WDT. If crystal accuracy is desired, the
ECO (32.768 kHz external crystal oscillator) is available for use
as a Real Time Clock (RTC) and can optionally generate a crys-
tal-accurate 24 MHz system clock using a PLL. The clocks,
together with programmable clock dividers (as a System
Resource), provide the flexibility to integrate almost any timing
requirement into the PSoC device.
PSoC GPIOs provide connection to the CPU, digital and analog
resources of the device. Each pin’s drive mode may be selected
from eight options, allowing great flexibility in external interfac-
ing. Every pin also has the capability to generate a system inter-
rupt on high level, low level, and change from last read.
The Digital System
The Digital System is composed of 16 digital PSoC blocks.
Each block is an 8-bit resource that can be used alone or com-
bined with other blocks to form 8, 16, 24, and 32-bit peripherals,
which are called user module references. Digital peripheral con-
figurations include those listed below.
■
PWMs (8 to 32 bit)
■
PWMs with Dead band (8 to 32 bit)
■
Counters (8 to 32 bit)
■
Timers (8 to 32 bit)
■
UART 8 bit with selectable parity (up to 4)
■
SPI master and slave (up to 4 each)
■
I2C slave and master (1 available as a System Resource)
■
Cyclical Redundancy Checker/Generator (8 to 32 bit)
■
IrDA (up to 4)
■
Pseudo Random Sequence Generators (8 to 32 bit)
The digital blocks can be connected to any GPIO through a
series of global buses that can route any signal to any pin. The
buses also allow for signal multiplexing and for performing logic
operations. This configurability frees your designs from the con-
straints of a fixed peripheral controller.
Digital blocks are provided in rows of four, where the number of
blocks varies by PSoC device family. This allows you the opti-
mum choice of system resources for your application. Family
resources are shown in the table titled
“PSoC Device Charac-
teristics” on page 3
.
Digital System Block Diagram
The Analog System
The Analog System is composed of 12 configurable blocks,
each comprised of an opamp circuit allowing the creation of
complex analog signal flows. Analog peripherals are very flexi-
ble and can be customized to support specific application
requirements. Some of the more common PSoC analog func-
tions (most available as user modules) are listed below.
■
Analog-to-digital converters (up to 4, with 6- to 14-bit resolu-
tion, selectable as Incremental, Delta Sigma, and SAR)
■
Filters (2, 4, 6, or 8 pole band-pass, low-pass, and notch)
■
Amplifiers (up to 4, with selectable gain to 48x)
■
Instrumentation amplifiers (up to 2, with selectable gain to
93x)
■
Comparators (up to 4, with 16 selectable thresholds)
■
DACs (up to 4, with 6- to 9-bit resolution)
■
Multiplying DACs (up to 4, with 6- to 9-bit resolution)
■
High current output drivers (four with 40 mA drive as a Core
Resource)
DIGITAL SYSTEM
To System Bus
Digital Clocks
From Core
Digital PSoC Block Array
To Analog
System
8
R
C
R
C
8
8
8
Row 1
DBB10
DBB11
DCB12
DCB13
R
C
4
4
R
C
R
C
R
C
Row 2
DBB20
DBB21
DCB22
DCB23
4
4
Row 0
DBB00
DBB01
DCB02
DCB03
4
4
R
C
R
C
Row 3
DBB30
DBB31
DCB32
DCB33
4
4
GIE[7:0]
GIO[7:0]
GOE[7:0]
GOO[7:0]
Global Digital
Interconnect
Port 7
Port 6
Port 5
Port 4
Port 3
Port 2
Port 1
Port 0
相關(guān)PDF資料 |
PDF描述 |
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| CY8C29466-24SXI | Mixed Signal Array |
| CY8C29466-24SXIT | Mixed Signal Array |
| CY8C29566 | RES. 0603, SMD, 0.1%, TNF, 25PPM/C 100 OHM |
| CY8C29666 | Mixed Signal Array |
| CY8C29666-24PVXI | Mixed Signal Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C29866-24AXIT | 功能描述:可編程片上系統(tǒng) - PSoC 32K 2K RAM 3.0-5.25V I2C, SPI, UART RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:67 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風(fēng)格:SMD/SMT |
| CY8C3244AXA-143 | 制造商:Cypress Semiconductor 功能描述:CY8C3244AXA-143 - Trays |
| CY8C3244AXA-146 | 制造商:Cypress Semiconductor 功能描述:CY8C3244AXA-146 - Trays |
| CY8C3244AXI-143 | 功能描述:IC MCU 8BIT 16KB FLASH 100TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:PSOC® 3 CY8C32xx 標(biāo)準(zhǔn)包裝:60 系列:PSOC® 3 CY8C38xx 核心處理器:8051 芯體尺寸:8-位 速度:67MHz 連通性:EBI/EMI，I²C，LIN，SPI，UART/USART 外圍設(shè)備:電容感應(yīng)，DMA，LCD，POR，PWM，WDT 輸入/輸出數(shù):25 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:2K x 8 RAM 容量:8K x 8 電壓 - 電源 (Vcc/Vdd):1.71 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 2x20b，D/A 4x8b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFQFN 裸露焊盤 包裝:托盤 |
| CY8C3244AXI-146 | 功能描述:IC MCU 8BIT 16KB FLASH 100TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:PSOC® 3 CY8C32xx 標(biāo)準(zhǔn)包裝:60 系列:PSOC® 3 CY8C38xx 核心處理器:8051 芯體尺寸:8-位 速度:67MHz 連通性:EBI/EMI，I²C，LIN，SPI，UART/USART 外圍設(shè)備:電容感應(yīng)，DMA，LCD，POR，PWM，WDT 輸入/輸出數(shù):25 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:2K x 8 RAM 容量:8K x 8 電壓 - 電源 (Vcc/Vdd):1.71 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 2x20b，D/A 4x8b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFQFN 裸露焊盤 包裝:托盤 |
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