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參數(shù)資料
| 型號： | CY8C27443-24SI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | PSoC Mixed Signal Array |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PDSO28 |
| 封裝： | 0.300 INCH, LEAD FREE, MO-119, SOIC-28 |
| 文件頁數(shù)： | 3/44頁 |
| 文件大小： | 542K |
| 代理商： | CY8C27443-24SI |
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August 3, 2004
Document No. 38-12012 Rev. *I
3
CY8C27x43 Final Data Sheet
PSoC Overview
Analog blocks are provided in columns of three, which includes
one CT (Continuous Time) and two SC (Switched Capacitor)
blocks, as shown in the figure below.
Analog System Block Diagram
Additional System Resources
System Resources, some of which have been previously listed,
provide additional capability useful to complete systems. Addi-
tional resources include a multiplier, decimator, switch mode
pump, low voltage detection, and power on reset. Brief state-
ments describing the merits of each system resource are pre-
sented below.
■
Digital clock dividers provide three customizable clock fre-
quencies for use in applications. The clocks can be routed to
both the digital and analog systems. Additional clocks can be
generated using digital PSoC blocks as clock dividers.
■
A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate, to assist in both general math as well
as digital filters.
■
The decimator provides a custom hardware filter for digital
signal processing applications including the creation of Delta
Sigma ADCs.
■
The I2C module provides 100 and 400 kHz communication
over two wires. Slave, master, and multi-master modes are
all supported.
■
Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
■
An internal 1.3V reference provides an absolute reference for
the analog system, including ADCs and DACs.
■
An integrated switch mode pump (SMP) generates normal
operating voltages from a single 1.2V battery cell, providing a
low cost boost converter.
PSoC Device Characteristics
Depending on your PSoC device characteristics, the digital and
analog systems can have 16, 8, or 4 digital blocks and 12, 6, or
3 analog blocks. The following table lists the resources
available for specific PSoC device groups. The PSoC device
covered by this data sheet is shown in the second row of the
table.
ACB00
ACB01
Block Array
Array Input Configuration
ACI1[1:0]
ACI2[1:0]
ACB02
ACB03
ASC12
ASD13
ASD22
ASC23
ASD20
ACI0[1:0]
ACI3[1:0]
P0[6]
P0[4]
P0[2]
P0[0]
P2[2]
P2[0]
P2[6]
P2[4]
R
A
P0[7]
P0[5]
P0[3]
P0[1]
P2[3]
P2[1]
Reference
Generators
AGNDIn
RefIn
Bandgap
RefHi
RefLo
AGND
ASD11
ASC21
ASC10
Interface to
Digital System
M8C Interface (Address Bus, Data Bus, Etc.)
Analog Reference
PSoC Device Characteristics
PSoC Part
Number
D
I
D
R
D
B
A
I
A
O
A
C
A
B
CY8C29x66
up to
64
up to
44
up to
24
up to
24
up to
16
4
16
12
4
4
12
CY8C27x43
2
8
12
4
4
12
CY8C24x23
1
4
12
2
2
6
CY8C24x23A
1
4
12
2
2
6
CY8C22x13
1
4
8
1
1
3
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PDF描述 |
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| CY8C27443-24SIT | PSoC Mixed Signal Array |
| CY8C27443-24SXI | PSoC Mixed Signal Array |
| CY8C27443-24SXIT | PSoC Mixed Signal Array |
| CY8C27543-24AI | PSoC Mixed Signal Array |
| CY8C27143-24PXI | PSoC Mixed Signal Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C27443-24SXI | 功能描述:可編程片上系統(tǒng) - PSoC IC MCU 16K FLSH 256B SRAM RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:67 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風(fēng)格:SMD/SMT |
| CY8C27443-24SXIT | 功能描述:可編程片上系統(tǒng) - PSoC 16K FlSh 256B RAM IND RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:67 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風(fēng)格:SMD/SMT |
| CY8C2744324VXIT | 制造商:CYPRESS 功能描述:IC PSOC MIXED SIGNAL MICROCON |
| CY8C27443-24VXIT | 制造商:CYPRESS 功能描述:IC PSOC MIXED SIGNAL MICROCON |
| CY8C2754324AXI | 制造商:Cypress Semiconductor 功能描述: |
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