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| 型號： | CY8C20234 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | PSoC Mixed-Signal Array(PSoC混合信號陣列) |
| 中文描述： | PSoC混合信號陣列（的PSoC混合信號陣列） |
| 文件頁數(shù)： | 15/32頁 |
| 文件大?。?/td> | 378K |
| 代理商： | CY8C20234 |
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September 18, 2006
Document No. 001-05356 Rev. *B
15
CY8C20234, CY8C20334, CY8C20434 Final Data Sheet
2. Electrical Specifications
2.3.5
DC Programming Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, or 2.4V to 3.0V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters
apply to 5V, 3.3V, or 2.7V at 25
°
C and are for design guidance only.
Table 2-9. DC Programming Specifications
Symbol
Vdd
IWRITE
I
DDP
V
ILP
V
IHP
I
ILP
Description
Min
Typ
Max
Units
Notes
Supply Voltage for Flash Write Operations
Supply Current During Programming or Verify
Input Low Voltage During Programming or Verify
Input High Voltage During Programming or Verify
Input Current when Applying Vilp to P1[0] or P1[1] During
Programming or Verify
Input Current when Applying Vihp to P1[0] or P1[1] During
Programming or Verify
Output Low Voltage During Programming or Verify
Output High Voltage During Programming or Verify
2.70
–
–
2.2
–
–
5
–
–
–
–
25
0.8
–
0.2
V
mA
V
V
mA
Driving internal pull-down resistor.
I
IHP
–
–
1.5
mA
Driving internal pull-down resistor.
V
OLV
V
OHV
–
Vdd
- 1.0
50,000
1,800,000
10
–
–
Vss + 0.75 V
Vdd
V
Flash
ENPB
Flash
ENT
Flash
DR
Flash Endurance (per block)
Flash Endurance (total)
a
Flash Data Retention
–
–
–
–
–
–
–
–
Years
Erase/write cycles per block.
Erase/write cycles.
a. A maximumof 36 x 50,000 block endurance cycles is allowed. This may be balanced between operations on 36x1 blocks of 50,000 maximumcycles each, 36x2 blocks of
25,000 maximumcycles each, or 36x4 blocks of 12,500 maximumcycles each (to limt the total number of cycles to 36x50,000 and that no single block ever sees more than
50,000 cycles).
相關PDF資料 |
PDF描述 |
|---|---|
| CY8C20334 | PSoC Mixed-Signal Array(PSoC混合信號陣列) |
| CY8C22213-24PVIT | PSoC Mixed Signal Array |
| CY8C22113 | PSoC Mixed Signal Array |
| CY8C22113-24PI | PSoC Mixed Signal Array |
| CY8C22113-24SI | PSoC Mixed Signal Array |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C20234_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoC Programmable System-0n-Chip |
| CY8C20234_10 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Automotive PSoC? Programmable System-on-Chip |
| CY8C20234_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Automotive PSoC Programmable System-on-Chip |
| CY8C20234-12LKXA | 功能描述:可編程片上系統(tǒng) - PSoC 13 I/O 8K FLASH 512 SRAM RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:67 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風格:SMD/SMT |
| CY8C20234-12LKXAT | 功能描述:可編程片上系統(tǒng) - PSoC 13 I/O 8K FLASH 512 SRAM RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:67 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風格:SMD/SMT |
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