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參數(shù)資料
| 型號： | CY7C9335A |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 87K |
| 代理商： | CY7C9335A |
SMPTE-259M/DVB-ASI
Descrambler/Framer-Controller
CY7C9335A
Cypress Semiconductor Corporation
Document #: 38-02083 Rev. **
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised October 13, 2003
Features
Fully compatible with SMPTE-259M
Fully compatible with DVB-ASI
Operates from a single +5V supply
100-pin TQFP package
Decodes 10-bit parallel digital streams for 27M
characters/sec (270 Mbits/sec serial)
Operates with CY7B9334 SMPTE HOTLink
deseri-
alizer/receiver
X
9
+ X
4
+ 1 descrambler and NRZI-to-NRZ decoder may
be bypassed for raw data output
Functional Description
SMPTE-259M Operation
The CY7C9335A is a CMOS integrated circuit designed to
decode SMPTE-125M bit-parallel digital characters (or other
data formats) using the SMPTE-259M decoding rules.
Following decoding, the characters are framed by locating the
30-bit TRS pattern in the parallel character stream. The
framed characters are then output.
The inputs of the CY7C9335A are designed to be directly
mated to a CY7B9334 HOTLink receiver, which converts the
SMPTE-259M compatible high-speed serial data stream into
10-bit parallel characters.
This device performs both TRS (sync) detection and framing,
data descrambling with the SMPTE-259M X
9
+X
4
+1 algorithm,
and NRZI-to-NRZ decoding. These functions operate at a 27
MHz character rate. For those systems operating with
non-SMPTE-259M compliant video streams (or for diagnostic
purposes), the descrambler and NRZI decoding functions can
be disabled.
DVB-ASI Operation
The CY7C9335A also contains the necessary multiplexers,
control inputs and outputs, to control a DVB-ASI-compliant
video stream. DVB-ASI operation is enabled through
activation of a single input signal. This allows a single
serial-to-parallel input port to support both SMPTE and DVB
data streams under software or hardware control.
In DVB-ASI mode the CY7C9335A automatically enables both
the 8B/10B decoder and multibyte framer present in the
CY7B9334 receiver/deserializer. All error detection, fill, and
command codes are detected and output by the CY7C9335A.
The CY7C9335A operates from a single +5V supply. It is
available in a 100-pin TQFP space saving package.
D
9
(RVS)
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
(SC/D)
SYNC_EN
BYPASS
DVB_EN
CKR
OE
I
N
11
S
10
T
10
O
SYNC_ERR
RF
PD
9
(SVS)
PD
8
PD
7
PD
6
PD
5
PD
4
PD
3
PD
2
PD
1
PD
0
(SC/D)
M
19
10
H_SYNC
B
10
O
4
A/B
Logic Block Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C9335A-270AXC | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SMPTE Decoder COM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| CY7C9335A-270AXCT | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SMPTE Decoder COM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| CY7C9528-BLC | 制造商:Cypress Semiconductor 功能描述:OC-12/3 (STM-4/1) FRAMER, 504 BGA - Bulk |
| CY7C9528-BLI | 制造商:Cypress Semiconductor 功能描述:OC-12/3 (STM-4/1) FRAMER, 504 BGA - Bulk |
| CY7C9536B-BLC | 制造商:Cypress Semiconductor 功能描述:Framer OC-12/OC-3/OC-48/STM-1/STM-16/STM-4/STS-12/STS-48/STS3 1.8V 504-Pin L2BGA |
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