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參數(shù)資料
| 型號： | CY7C64113C |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Full-Speed USB (12-Mbps)(全速USB(12-Mbps)) |
| 中文描述： | 全速USB（12 Mbps）的（全速的USB（12 Mbps）的） |
| 文件頁數(shù)： | 21/51頁 |
| 文件大?。?/td> | 2601K |
| 代理商： | CY7C64113C |
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CY7C64013C
CY7C64113C
Document #: 38-08001 Rev. *B
Page 21 of 51
Q1, Q2, and Q3 discussed below are the transistors referenced in
Figure 9-1
. The available GPIO drive strength are:
Output LOW Mode:
The pin’s Data Register is set to ‘0’
Writing ‘0’ to the pin’s Data Register puts the pin in output LOW mode, regardless of the contents of the Port Configuration
Bits[1:0]. In this mode, Q1 and Q2 are OFF. Q3 is ON. The GPIO pin is driven LOW through Q3.
Output HIGH Mode:
The pin’s Data Register is set to 1 and the Port Configuration Bits[1:0] is set to ‘10’
In this mode, Q1 and Q3 are OFF. Q2 is ON. The GPIO is pulled up through Q2. The GPIO pin is capable of sourcing... of
current.
Resistive Mode:
The pin’s Data Register is set to 1 and the Port Configuration Bits[1:0] is set to ‘11’
Q2 and Q3 are OFF. Q1 is ON. The GPIO pin is pulled up with an internal 14k
resistor. In resistive mode, the pin may serve
as an input. Reading the pin’s Data Register returns a logic HIGH if the pin is not driven LOW by an external source.
Hi-Z Mode
: The pin’s Data Register is set to1 and Port Configuration Bits[1:0] is set either ‘00’ or ‘01’
Q1, Q2, and Q3 are all OFF. The GPIO pin is not driven internally. In this mode, the pin may serve as an input. Reading the
Port Data Register returns the actual logic value on the port pins.
9.2
Each GPIO pin can be individually enabled or disabled as an interrupt source. The Port 0–3 Interrupt Enable registers provide
this feature with an interrupt enable bit for each GPIO pin. When HAPI mode (discussed in Section 14.0) is enabled the GPIO
interrupts are blocked, including ports not used by HAPI, so GPIO pins cannot be used as interrupt sources.
During a reset, GPIO interrupts are disabled by clearing all of the GPIO interrupt enable ports. Writing a ‘1’ to a GPIO Interrupt
Enable bit enables GPIO interrupts from the corresponding input pin. All GPIO pins share a common interrupt, as discussed in
Section 16.7
Port 0 Interrupt Enable
Bit #
7
6
5
4
GPIO Interrupt Enable Ports
ADDRESS 0x04
0
Port 2 Interrupt Enable
Bit #
ADDRESS 0x06
0
Port 3 Interrupt Enable
Bit #
ADDRESS 0x07
0
10.0
DAC Port
The CY7C64113C features a programmable current sink 4 bit port which is also known as a DAC port. Each of these port I/O
pins have a programmable current sink. Writing a ‘1’ to a DAC I/O pin disables the output current sink (Isink DAC) and drives the
I/O pin HIGH through an integrated 14-k
resistor. When a ‘0’ is written to a DAC I/O pin, the Isink DAC is enabled and the pull-
up resistor is disabled. This causes the I
sink
DAC to sink current to drive the output LOW.
Figure 10-1
shows a block diagram of
the DAC port pin.
3
2
1
Bit Name
P0.7 Intr Enable
P0.6 Intr Enable
P0.5 Intr Enable
P0.4 Intr Enable
P0.3 Intr Enable P0.2 Intr Enable
P0.1 Intr Enable
P0.0 Intr Enable
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 9-7. Port 0 Interrupt Enable
Bit #
7
6
5
4
3
2
1
0
Bit Name
P1.7 Intr Enable
P1.6 Intr Enable
P1.5 Intr Enable
P1.4 Intr Enable
P1.3 Intr Enabl
P1.2 Intr Enable
P1.1 Intr Enable
P1.0 Intr Enable
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 9-8. Port 1 Interrupt Enable
7
6
5
4
3
2
1
Bit Name
P2.7 Intr Enable
P2.6 Intr Enable
P2.5 Intr Enable
P2.4 Intr Enable
P2.3 Intr Enable P2.2 Intr Enable
P2.1 Intr Enable
P2.0 Intr Enable
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 9-9. Port 2 Interrupt Enable
7
6
5
4
3
2
1
Bit Name
Reserved
(Set to 0)
P3.6 Intr Enable
P3.5 Intr Enable
P3.4 Intr Enable
P3.3 Intr Enable P3.2 Intr Enable
P3.1 Intr Enable
P3.0 Intr Enable
Read/Write
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
Figure 9-10. Port 3 Interrupt Enable
相關(guān)PDF資料 |
PDF描述 |
|---|---|
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| CY7C64113 | Full-Speed USB (12 Mbps) Function(全速 USB (12 Mbps)性能) |
| CY7C64713 | EZ-USB FX1 USB Microcontroller Full-speed USB Peripheral Controller(EZ-USB FX1 USB微控制器，全速USB外設(shè)控制器) |
| CY7C64714 | EZ-USB FX1 USB Microcontroller Full-speed USB Peripheral Controller(EZ-USB FX1 USB微控制器，全速USB外設(shè)控制器) |
| CY7C68001 | EZ-USB FX2 USB Microcontroller High-Speed USB Peripheral Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C64113C-PVXC | 功能描述:IC MCU 8K FULL SPEED USB 48-SSOP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:M8™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| CY7C64113-PVC | 功能描述:IC MCU 8K FULL SPEED USB 48-SSOP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:M8™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
| CY7C64113-PVCT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C6421528PVXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C64215-28PVXC | 功能描述:8位微控制器 -MCU USB Full Spd Peripherals RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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