參數(shù)資料
型號(hào)： CY7C63221A
廠商： Cypress Semiconductor Corp.
英文描述： enCoRe USB Low-speed USB Peripheral Controller
中文描述： 的enCoRe USB低速USB外設(shè)控制器
文件頁(yè)數(shù)： 24/49頁(yè)
文件大?。?/td> 960K
代理商： CY7C63221A
FOR
FOR
enCoRe
USB
CY7C63221/31A
Document #: 38-08028 Rev. *A
Page 24 of 49
Bit 3: USB Bus Activity
The Bus Activity bit is a
“
sticky
”
bit that detects any non-idle USB event has occurred on the USB bus. Once set to HIGH by
the SIE to indicate the bus activity, this bit retains its logical HIGH value until firmware clears it. Writing a
‘
0
’
to this bit clears
it; writing a
‘
1
’
preserves its value. The user firmware should check and clear this bit periodically to detect any loss of bus
activity. Firmware can clear the Bus Activity bit, but only the SIE can set it. The 1.024-ms timer interrupt service routine is
normally used to check and clear the Bus Activity bit.
1 = There has been bus activity since the last time this bit was cleared. This bit is set by the SIE.
0 = No bus activity since last time this bit was cleared (by firmware).
Bit [2:0]: D+/D
–
Forcing Bit [2:0]
Forcing bits allow firmware to directly drive the D+ and D
–
pins, as shown in
Table 13-1
. Outputs are driven with controlled
edge rates in these modes for low EMI. For forcing the D+ and D
–
pins in USB mode, D+/D
–
Forcing Bit 2 should be 0. Setting
D+/D
–
Forcing Bit 2 to
‘
1
’
puts both pins in an open-drain mode, preferred for applications such as PS/2 or LED driving.
Table 13-1. Control Modes to Force D+/D
–
Outputs
D+/D
–
Forcing Bit [2:0]
000
001
010
011
100
101
110
111
Control Action
Application
Any Mode
USB Mode
Not forcing (SIE controls driver)
Force K (D+ HIGH, D
–
LOW)
Force J (D+ LOW, D
–
HIGH)
Force SE0 (D
–
LOW, D+ LOW)
Force D
–
LOW, D+ LOW
Force D
–
LOW, D+ HiZ
Force D
–
HiZ, D+ LOW
Force D
–
HiZ, D+ HiZ
PS/2 Mode
[2]
Note:
2.
For PS/2 operation, the D+/D- Forcing Bit [2:0] = 111b mode must be set initially (one time only) before using the other PS/2 force modes.
相關(guān)PDF資料
PDF描述
CY7C63221A-PC enCoRe USB Low-speed USB Peripheral Controller
CY7C63221A-XC TV 32C 32#20 SKT RECP
CY7C63231A enCoRe USB Low-speed USB Peripheral Controller(enCoRe USB 低速USB外設(shè)控制器)
CY7C64013C Full-Speed USB (12-Mbps)(全速USB(12-Mbps))
CY7C64113C Full-Speed USB (12-Mbps)(全速USB(12-Mbps))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C63221A-PC 功能描述:IC MCU 3K USB LS PERIPH 16-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
CY7C63221A-PXC 功能描述:IC MCU 3K USB LS PERIPH 16-DIP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
CY7C63221A-XC 功能描述:USB 接口集成電路 enCoReUSB Controller Lo Speed RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63231A-PXC 功能描述:8位微控制器 -MCU enCoRe RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C63231A-SC 功能描述:IC MCU 3K USB LS PERIPH 18-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
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