參數(shù)資料
型號： CY7C60113
廠商： Cypress Semiconductor Corp.
英文描述： Wireless enCoRe II Microcontroller(無線enCoRe II微控制器)
中文描述： 的Wireless enCoRe II微控制器（無線enCoRe II還微控制器）
文件頁數(shù)： 38/62頁
文件大?。?/td> 1276K
代理商： CY7C60113
CY7C601xx
CY7C602xx
Document 38-16016 Rev. *C
Page 38 of 62
P1.3 Configuration (SSEL)
P1.4–P1.6 Configuration (SCLK, SMOSI, SMISO)
P1.7 Configuration
Table 57.P1.3 Configuration (P13CR) [0x10] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Int Enable
Int Act Low
Reserved
High Sink
Open Drain
Pull Up Enable
Output Enable
Read/Write
–
R/W
R/W
–
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
This register controls the operation of the P1.3 pin.
The P1.3 GPIO’s threshold is always set to TTL.
When the SPI hardware is enabled, the output enable and output state of the pin is controlled by the SPI circuitry. When the SPI
hardware is disabled, the pin is controlled by the Output Enable bit and the corresponding bit in the P1 data register.
Regardless of whether the pin is used as an SPI or GPIO pin the Int Enable, Int act Low, High Sink, Open Drain, and Pull Up
Enable control the behavior of the pin.
The 50-mA sink drive capability is only available in the CY7C602xx. In the CY7C601xx, only 8-mA sink drive capability is available
on this pin regardless of the setting of the High Sink bit.
Table 58.P1.4–P1.6 Configuration (P14CR–P16CR) [0x11–0x13] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
SPI Use
Int Enable
Int Act Low
Reserved
High Sink
Open Drain
Pull Up Enable
Output Enable
Read/Write
R/W
R/W
R/W
–
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
These registers control the operation of pins P1.4–P1.6, respectively.
The P1.4–P1.6 GPIO’s threshold is always set to TTL.
When the SPI hardware is enabled, pins that are configured as SPI Use have their output enable and output state controlled by
the SPI circuitry. When the SPI hardware is disabled or a pin has its SPI Use bit clear, the pin is controlled by the Output Enable
bit and the corresponding bit in the P1 data register.
Regardless of whether any pin is used as an SPI or GPIO pin the Int Enable, Int act Low, High Sink, Open Drain, and Pull-up
Enable control the behavior of the pin.
The 50-mA sink drive capability is only available in the CY7C602xx. In the CY7C601xx, only 8-mA sink drive capability is available
on this pin regardless of the setting of the High Sink bit.
Bit 7:
SPI Use
0 = Disable the SPI alternate function. The pin is used as a GPIO
1 = Enable the SPI function. The SPI circuitry controls the output of the pin
Important Note for Comm Modes 01 or 10 (SPI Master or SPI Slave, see
Table 64
):
When configured for SPI (SPI Use = 1 and Comm Modes [1:0] = SPI Master or SPI Slave mode), the input/output direction of
pins P1.3, P1.5, and P1.6 is set automatically by the SPI logic. However, pin P1.4's input/output direction is NOT automatically
set; it must be explicitly set by firmware. For SPI Master mode, pin P1.4 must be configured as an output; for SPI Slave mode,
pin P1.4 must be configured as an input.
Table 59. P1.7 Configuration (P17CR) [0x14] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Int Enable
Int Act Low
Reserved
High Sink
Open Drain
Pull Up Enable
Output Enable
Read/Write
–
R/W
R/W
–
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
This register controls the operation of pin P1.7.
The 50-mA sink drive capability is only available in the CY7C602xx. In the CY7C601xx, only 8-mA sink drive capability is available
on this pin regardless of the setting of the High Sink bit.
The P1.7 GPIO’s threshold is always set to TTL.
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相關代理商/技術參數(shù)
參數(shù)描述
CY7C60113-PVXC 功能描述:IC MCU 8K WIRELESS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:enCoRe™ II CY7C601xx 標準包裝:60 系列:PSOC® 3 CY8C38xx 核心處理器:8051 芯體尺寸:8-位 速度:67MHz 連通性:EBI/EMI，I²C，LIN，SPI，UART/USART 外圍設備:電容感應，DMA，LCD，POR，PWM，WDT 輸入/輸出數(shù):25 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:2K x 8 RAM 容量:8K x 8 電壓 - 電源 (Vcc/Vdd):1.71 V ~ 5.5 V 數(shù)據(jù)轉換器:A/D 2x20b，D/A 4x8b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFQFN 裸露焊盤 包裝:托盤
CY7C60123-3X14C 制造商:Cypress Semiconductor 功能描述:CY7C60123-3X14C - Bulk 制造商:Cypress Semiconductor 功能描述:USB
CY7C60123-3XWC 制造商:Cypress Semiconductor 功能描述:USB - Bulk
CY7C60123-PVXC 功能描述:8位微控制器 -MCU 8K Flash 256byte RAM 48 COM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
CY7C60123-PVXCKJ 制造商:Cypress Semiconductor 功能描述:
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