參數(shù)資料
型號: CY7C470-25LMB
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
中文描述: 8K X 9 OTHER FIFO, 25 ns, CQCC32
封裝: CERAMIC, LCC-32
文件頁數(shù): 1/15頁
文件大?。?/td> 270K
代理商: CY7C470-25LMB
8K x 9 FIFO, 16K x 9 FIFO
32K x 9 FIFO with Programmable Flags
CY7C470
CY7C472
CY7C474
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
December 1990 – Revised April 1995
408-943-2600
1CY7C474
Features
8K x 9, 16K x 9, and 32K x 9 FIFO buffer memory
Asynchronous read/write
High-speed 33.3-MHz read/write independent of
depth/width
Low operating power
—I
CC
(max.) = 70 mA
Programmable Almost Full/Empty flag
Empty, Almost Empty, Half Full, Almost Full, and Full
status flags
Programmable retransmit
Expandable in width
5V
±
10% supply
TTL compatible
Three-state outputs
Proprietary 0.8-micron CMOS technology
Functional Description
The CYC47X FIFO series consists of high-speed, low-power,
first-in first-out (FIFO) memories with programmable flags and
retransmit mark. The CY7C470, CY7C472, and CY7C474 are
8K, 16K, and 32K words by 9 bits wide, respectively. They are
offered in 600-mil DIP, PLCC, and LCC packages. Each FIFO
memory is organized such that the data is read in the same
sequential order that it was written. Three status pins—Emp-
ty/Full (E/F), Programmable Almost Full/Empty (PAFE), and
Half Full (HF)—are provided to the user. These pins are de-
coded to determine one of six states: Empty, Almost Empty,
Less than Half Full, Greater than Half Full, Almost Full, and
Full.
The read and write operations may be asynchronous; each
can occur at a rate of 33.3 MHz. The write operation occurs
when the write (W) signal goes LOW. Read occurs when read
(R) goes LOW. The nine data outputs go into a high-imped-
ance state when R is HIGH.
The user can store the value of the read pointer for retransmit
by using the MARK pin. A LOW on the retransmit (RT) input
causes the FIFO to resend data by resetting the read pointer
to the value stored in the mark pointer.
In the standalone and width expansion configurations, a LOW
on the retransmit (RT) input causes the FIFO to resend the
data. With the mark feature, retransmit can start from any word
in the FIFO.
The CYC47X series is fabricated using a proprietary 0.8-mi-
cron N-well CMOS technology. Input ESD protection is greater
than 2001V and latch-up is prevented by the use of reliable
layout techniques, guard rings, and a substrate bias generator.
Logic Block Diagram
Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
Top View
DIP
W
D
8
D
3
D
2
D
1
D
0
MARK
PAFE
Q
0
Q
1
Q
2
Q
3
Q
8
GND
V
cc
D
4
D
5
D
6
D
7
RT
MR
E/F
HF
Q
7
Q
6
Q
5
Q
4
R
PLCC/LCC
Top View
4
3
2
1
32 31 30
14 15 16 17 18 19 20
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
RT
MR
E/F
HF
Q
7
Q
6
D
6
D
7
NC
MARK
POINTER
WRITE
POINTER
RESET
LOGIC
RAM ARRAY
8K x 9
16K x 9
32K x 9
DATAINPUTS
(D
0
–D
8
)
THREE–
STATE
BUFFERS
DATAOUTPUTS
(Q
0
–Q
8
)
READ
POINTER
FLAG
LOGIC
E/F
PAFE
MR
RT
MARK
D
2
D
1
D
0
MARK
PAFE
Q
0
Q
1
NC
Q
2
7C470–1
7C470–2
7C470–3
7C470
7C472
7C474
7C470
7C472
7C474
W
HF
R
PROGRAMMABLE
FLAG REGISTER
相關PDF資料
PDF描述
CY7C470-25PC 8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C470-40DMB 8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C470-40JC 8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C470-40JI 8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C472-25LMB 8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
相關代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C470-40JI 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述:
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CY7C472-15JI 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述:
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