參數(shù)資料
型號(hào): CY7C462A-25PC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類(lèi): DRAM
英文描述: Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs
中文描述: 16K X 9 OTHER FIFO, 25 ns, PDIP28
封裝: 0.600 INCH, DIP-28
文件頁(yè)數(shù): 9/15頁(yè)
文件大小: 250K
代理商: CY7C462A-25PC
CY7C460A/CY7C462A
CY7C464A/CY7C466A
Document #: 38-06011 Rev. *A
Page 9 of 15
number of writes equal-to-or-less-than the depth of the FIFO
have occurred since the last MR cycle. A LOW pulse on RT
resets the internal read pointer to the first physical location of
the FIFO. R and W must both be HIGH while and t
RTR
after
retransmit is LOW. With every read cycle after retransmit, pre-
viously accessed data is read and the read pointer increment-
ed until equal to the write pointer. Full, Half Full, and Empty
flags are governed by the relative locations of the read and
write pointers and are updated during a retransmit cycle. Data
written to the FIFO after activation of RT are transmitted also.
The full depth of the FIFO can be repeatedly retransmitted.
Standalone/Width Expansion Modes
Standalone and width expansion modes are set by grounding
expansion in (XI) and tying first load (FL) to V
CC
prior to a MR
cycle. FIFOs can be expanded in width to provide word widths
greater than nine in increments of nine. During width expan-
sion mode, all control line inputs are common to all devices,
and flag outputs from any device can be monitored.
Depth Expansion Mode (
see Figure 1
)
Depth expansion mode is entered when, during a MR cycle,
expansion out (XO) of one device is connected to expansion
in (XI) of the next device, with XO of the last device connected
to XI of the first device. In the depth expansion mode, the first
load (FL) input, when grounded, indicates that this is the first
part to be loaded. All other devices must have this pin HIGH.
To enable the correct FIFO, XO is pulsed LOW when the last
physical location of the previous FIFO is written to and is
pulsed LOW again when the last physical location is read.
Only one FIFO is enabled for Read and one is enabled for
Write at any given time. All other devices are in standby.
FIFOs can also be expanded simultaneously in depth and
width. Consequently, any depth or width FIFO can be created
with word widths in increments of nine. When expanding in
depth, a composite FF is created by ORing the FFs together.
Likewise, a composite EF is created by ORing EFs together.
HF and RT functions are not available in depth expansion
mode.
Figure 1. Depth Expansion
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W
RS
XI
FL
EF
XO
FF
XI
FL
EF
XO
XI
FL
EF
XO
FF
R
EMPTY
FULL
D
0-8
Q
0-8
9
9
9
9
9
FF
V
CC
* FIRSTDEVICE
*
C460A
17
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相關(guān)PDF資料
PDF描述
CY7C462A-25PTC Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs
CY7C464A Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs
CY7C464A-10JC Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs
CY7C464A-10PTC Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs
CY7C466A-10PTC Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C462A-25PTC 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述:
CY7C464-40JC 制造商:Cypress Semiconductor 功能描述:
CY7C464-65PC 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述:
CY7C464A-10JC 功能描述:IC ASYN FIFO CASCA 32KX9 32-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲(chǔ)容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱(chēng):74F433
CY7C464A-10JI 制造商:Cypress Semiconductor 功能描述: 制造商:e2v 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 32K x 9 32-Pin PLCC 制造商:e2v technologies 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 32K x 9 32-Pin PLCC