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參數(shù)資料
| 型號： | CY7C460A-25JC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| 中文描述： | 8K X 9 OTHER FIFO, 25 ns, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 250K |
| 代理商： | CY7C460A-25JC |
CY7C460A/CY7C462A
CY7C464A/CY7C466A
Document #: 38-06011 Rev. *A
Page 3 of 15
AC Test Loads and Waveforms
3.0V
5V
OUTPUT
R1 500
R2
333
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
≤
5 ns
≤
5 ns
5V
OUTPUT
R1 500
R2
333
5 pF
INCLUDING
JIG AND
SCOPE
OUTPUT
2V
Equivalent to:
TH
é
VENIN EQUIVALENT
200
(b)
C460A
–
4
C460A
–
5
C460A
–
6
(a)
ALL INPUT PULSES
Switching Characteristics
Over the Operating Range
[3, 6]
Parameter
Description
7C460A-10
7C462A-10
7C464A-10
7C466A-10
Min.
20
7C460A-15
7C462A-15
7C464A-15
7C466A-15
Min.
25
7C460A-25
7C462A-25
7C464A-25
7C466A-25
Min.
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
Max.
Max.
t
RC
t
A
t
RR
t
PR
t
LZR
t
DVR[7]
t
HZR[7]
t
WC
t
PW
t
HWZ
t
WR
t
SD
t
HD
t
MRSC
t
PMR
t
RMR
t
RPW
t
WPW
t
RTC
t
PRT
t
RTR
t
EFL
t
HFH
t
FFH
t
REF
t
RFF
Notes:
6.
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
Read LOW to Low Z
Data Valid After Read HIGH
Read HIGH to High Z
Write Cycle Time
Write Pulse Width
Write HIGH to Low Z
Write Recovery Time
Data Set-Up Time
Data Hold Time
MR Cycle Time
MR Pulse Width
MR Recovery Time
Read HIGH to MR HIGH
Write HIGH to MR HIGH
Retransmit Cycle Time
Retransmit Pulse Width
Retransmit Recovery Time
MR to EF LOW
MR to HF HIGH
MR to FF HIGH
Read LOW to EF LOW
Read HIGH to FF HIGH
10
15
25
10
10
3
3
10
15
3
3
10
25
3
3
15
15
18
20
10
5
10
9
0
20
10
10
10
10
20
10
10
25
15
5
10
9
0
25
15
10
15
15
25
15
10
35
25
5
10
9
0
35
25
10
25
25
35
25
10
20
20
20
10
10
25
25
25
15
15
35
35
35
25
25
Test conditions assume signal transmission time of 5 ns or less, timing reference levels of 1.5V and output loading of the specified I
OL
/I
OH
and 30-pF load
capacitance, as in part (a) of AC Test Loads, unless otherwise specified.
t
HZR
and t
DVR
use capacitance loading as in part (b) of AC Test Loads.
7.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C460A-25PC | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| CY7C460A-25PTC | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| CY7C462A | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| CY7C462A-10JC | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| CY7C462A-10JI | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C460A-25JCT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C460A-25PC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C460A-25PTC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C462A-10JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 16K x 9 32-Pin PLCC 制造商:e2v technologies 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 16K x 9 32-Pin PLCC |
| CY7C462A-10JI | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 16K x 9 32-Pin PLCC |
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