參數(shù)資料
型號(hào): CY7C43682AV-15AC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO
中文描述: 16K X 36 BI-DIRECTIONAL FIFO, 10 ns, PQFP120
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-120
文件頁數(shù): 1/30頁
文件大?。?/td> 474K
代理商: CY7C43682AV-15AC
1K/4K/16K x36 x2 Bidirectional
Synchronous FIFO
CY7C43642
CY7C43662
CY7C43682
Cypress Semiconductor Corporation
Document #: 38-06019 Rev. *B
3901 North First Street
San Jose
CA 95134
Revised December 26, 2002
408-943-2600
Features
High-speed, low-power, bidirectional, First-In, First-Out
(FIFO) memories
1Kx36x2 (CY7C43642)
4Kx36x2 (CY7C43662)
16Kx36x2 (CY7C43682)
0.35-micron CMOS for optimum speed/power
High speed 133-MHz operation (7.5-ns read/write cycle
times)
Low power
—I
CC
= 100 mA
—I
SB
= 10 mA
Fully asynchronous and simultaneous read and write
operation permitted
Mailbox bypass register for each FIFO
Parallel Programmable Almost Full and Almost Empty
flags
Retransmit function
Standard or FWFT mode user selectable
120-pin TQFP packaging
Easily expandable in width and depth
Logic Block Diagram
Port A
Control
Logic
Port B
Control
Logic
Mail1
Register
I
R
Write
Pointer
Read
Pointer
Status
Flag Logic
Programmable
Flag Offset
Registers
Timing
Mode
Status
Flag Logic
Write
Pointer
Read
Pointer
1K/4K/16K
x36
Dual Ported
Memory
256/512/1K
4K/16K x36
Dual Ported
Memory
Mail2
Register
O
R
I
R
FIFO1,
Mail1
Reset
Logic
FIFO2,
Mail2
Reset
Logic
CLKA
CSA
W/RA
ENA
MBA
RT2
RST1
FFA/IRA
AFA
FS0
FS1
A
0
35
EFA/ORA
AEA
MBF2
RST2
FFB/IRB
AFB
FWFT/STAN
B
0
35
CLKB
CSB
W/RB
ENB
MBB
RT1
EFB/ORB
AEB
MBF1
O
R
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