參數(shù)資料
型號(hào)： CY7C4235-25ASC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs
中文描述： 2K X 18 OTHER FIFO, 15 ns, PQFP64
封裝： 10 X 10 MM, TQFP-64
文件頁(yè)數(shù)： 15/25頁(yè)
文件大?。?/td> 409K
代理商： CY7C4235-25ASC
CY7C4425/4205/4215
CY7C4225/4235/4245
15
every valid read cycle after retransmit, previously accessed
data is read and the read pointer is incremented until it is equal
to the write pointer. Flags are governed by the relative loca-
tions of the read and write pointers and are updated during a
retransmit cycle. Data written to the FIFO after activation of RT
are transmitted also.
The full depth of the FIFO can be repeatedly retransmitted.
Width Expansion Configuration
The CY7C42X5 can be expanded in width to provide word
widths greater than 18 in increments of 18. During width ex-
pansion mode all control line inputs are common and all flags
are available. Empty (Full) flags should be created by ANDing
the Empty (Full) flags of every FIFO. This technique will avoid
ready data from the FIFO that is “staggered” by one clock cycle
due to the variations in skew between RCLK and WCLK.
Figure 1demonstrates a 36-word width by using two CY7C42X5.
Table 2. Flag Truth Table.
Number of Words in FIFO
7C4205 - 256 x 18
0
1 to n
[37]
(n+1) to 128
129 to (256 – (m+1))
(256 – m)
[38]
to 255
256
FF
H
H
H
H
H
L
PAF
H
H
H
H
L
L
HF
H
H
H
L
L
L
PAE
L
L
H
H
H
H
EF
L
H
H
H
H
H
7C4425 - 64 x 18
7C4215 - 512 x 18
0
1 to n
[37
(n+1) to 32
33 to (64 – (m+1))
(64 – m)
[38]
to 63
64
0
1 to n
[37]
(n+1) to 256
257 to (512 – (m+1))
(512 – m)
[38]
to 511
512
Number of Words in FIFO
7C4235 - 2K x 18
0
1 to n
[37]
(n+1) to 1024
1025 to (2048 – (m+1))
(2048 – m)
[38]
to 2047
2048
FF
H
H
H
H
H
L
PAF
H
H
H
H
L
L
HF
H
H
H
L
L
L
PAE
L
L
H
H
H
H
EF
L
H
H
H
H
H
7C4225 - 1K x 18
7C4245 - 4K x 18
0
1 to n
[37]
(n+1) to 512
513 to (1024 – (m+1))
(1024 – m)
[38]
to 1023
1024
0
1 to n
[37]
(n+1) to 2048
2049 to (4096 – (m+1))
(4096 – m)
[38]
to 4095
4096
Notes:
37. n = Empty Offset (Default Values: CY7C4425 n = 7, CY7C4205 n = 31, CY7C4215 n = 63, CY7C4225/7C4235/7C4245 n = 127).
38. m = Full Offset (Default Values: CY7C4425 n = 7, CY7C4205 n = 31, CY7C4215 n = 63, CY7C4225/7C4235/7C4245 n = 127).
Figure 1. Block Diagram of 64x36/256 x 36/512 x 36/1024 x 36/2048 x 36/4096 x 36 Synchronous FIFO Memory Used in a
Width Expansion Configuration.
42X5–24
FF
FF
EF
EF
WRITECLOCK(WCLK)
WRITEENABLE(WEN)
LOAD(LD)
PROGRAMMABLE(PAE)
HALF FULL FLAG(HF)
FULLFLAG(FF)
7C4425
7C4205
7C4215
7C4225
7C4235
7C4235
7C4425
7C4205
7C4215
7C4225
7C4235
7C4235
18
36
DATAIN (D)
RESET(RS)
18
RESET(RS)
READCLOCK(RCLK)
READENABLE(REN)
OUTPUTENABLE(OE)
PROGRAMMABLE(PAF)
EMPTYFLAG (EF)
18
DATAOUT(Q)
18
36
FIRST LOAD(FL)
WRITE EXPANSION IN (WXI)
READ EXPANSION IN (RXI)
相關(guān)PDF資料
PDF描述
CY7C4245-25ASC 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs
CY7C4425-25ASI 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs
CY7C4205-25ASI 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs
CY7C4215-25ASI 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs
CY7C4215-25AI 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs
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