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參數資料
| 型號： | CY7C4225-10JC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| 中文描述： | 1K X 18 OTHER FIFO, 8 ns, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數： | 11/25頁 |
| 文件大?。?/td> | 409K |
| 代理商： | CY7C4225-10JC |
CY7C4425/4205/4215
CY7C4225/4235/4245
11
Notes:
23. PAF offset = m. Number of data words written into FIFO already = 64 – m + 1 for the CY7C4425, 256 – m + 1 for the CY7C4205, 512 – m + 1 for the
CY7C4215. 1024 – m + 1 for the CY7C4225, 2048 – m + 1 for the CY7C4235, and 4096 – m + 1 for the CY7C4245.
24. PAF is offset = m.
25. 64 – m words in CY7C4425, 256 – m words inCY7C4205, 512 – m word in CY7C4215. 1024 – m words in CY7C4225, 2048 – m words in CY7C4235, and
4096 – m words in CY7C4245.
26. 64 – m + 1 words in CY7C4425, 256 – m + 1 words in CY7C4205, 512 – m +1 words in CY7C4215, 1024 – m + 1 CY7C4225, 2048 – m + 1 in CY74235,
and 4096 – m + 1 words in CY7C4245.
27. If a write is performed on this rising edge of the write clock, there will be Full – (m – 1) words of the FIFO when PAF goes LOW.
28. PAF offset = m.
29. 64 – m words in CY7C4425, 256 – m words in FIFO for CY7C4205, 512 – m word in CY7C4215. 1024 – m words in CY7C4225, 2048 – m words in CY7C4235,
and 4096 – m words in CY7C4245.
30. t
is the minimum time between a rising RCLK and a rising WCLK edge for PAF to change state during that clock cycle. If the time between the edge of RCLK and the
rising edge of WCLK is less than t
SKEW3
, then PAF may not change state until the next WCLK rising edge.
Switching Waveforms
(continued)
Note
t
ENH
WEN
WCLK
REN
RCLK
t
CLKH
t
PAF
t
ENS
t
CLKL
t
ENS
t
PAF
42X5–15
FULL
M WORDS
IN FIFO
FULL
M + 1 WORDS
IN FIFO
Programmable Almost Full Flag Timing
[26]
PAF
[24]
23
[25]
Note
27
Note
28
t
ENH
WCLK
PAF
RCLK
t
CLKH
t
ENS
FULL
M WORDS
IN FIFO
t
CLKL
t
ENS
FULL-
M+1
ORDS
INFIFO
42X5–16
t
ENH
t
ENS
t
ENH
t
ENS
t
PAF
REN
WEN2
t
SKEW3
t
PAFsynch
[30]
WEN
Programmable Almost Full Flag Timing (applies only in SMODE (SMODE in LOW))
[29]
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C4215-15JI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4215-25AC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4225-10JI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4225-15AC | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
| CY7C4225-15AI | 64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C422515AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C4225-15AC | 功能描述:IC SYNC FIFO MEM 1KX18 64LQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標準包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數據速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應商設備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| CY7C4225-15ACT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C4225-15ASXC | 功能描述:先進先出 1Kx18 IDT Compat SYNC 先進先出 COM RoHS:否 制造商:IDT 電路數量: 數據總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| CY7C4225-15AXC | 功能描述:先進先出 1Kx18 IDT Compat SYNC 先進先出 COM RoHS:否 制造商:IDT 電路數量: 數據總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
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