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參數(shù)資料
| 型號(hào)： | CY7C291A-25DMB |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2K x 8 Reprogrammable PROM |
| 中文描述： | 2K X 8 OTPROM, 25 ns, CDIP24 |
| 封裝： | 0.300 INCH, CERDIP-24 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 355K |
| 代理商： | CY7C291A-25DMB |
2K x 8 Reprogrammable PROM
CY7C291A
CY7C292A/CY7C293A
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
March 1986 – Revised May 1993
408-943-2600
1CY7C292A
Features
Windowed for reprogrammability
CMOS for optimum speed/power
High speed
—
20 ns (commercial)
—
25 ns (military)
Low power
—
660 mW (commercial and military)
Low standby power
—
220 mW (commercial and military)
EPROM technology 100% programmable
Slim 300-mil or standard 600-mil packaging available
5V
±
10% V
CC
, commercial and military
TTL-compatible I/O
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
Functional Description
The CY7C291A, CY7C292A, and CY7C293A are high-perfor-
mance 2K-word by 8-bit CMOS PROMs. They are functionally
identical, but are packaged in 300-mil (7C291A, 7C293A) and
600-mil wide plastic and hermetic DIP packages (7C292A).
The CY7C293A has an automatic power down feature which
reduces the power consumption by over 70% when deselect-
ed. The 300-mil ceramic package may be equipped with an
erasure window; when exposed to UV light the PROM is
erased and can then be reprogrammed. The memory cells uti-
lize proven EPROM floating-gate technology and byte-wide in-
telligent programming algorithms.
The CY7C291A, CY7C292A, and CY7C293A are plug-in re-
placements for bipolar devices and offer the advantages of
lower power, reprogrammability, superior performance and
programming yield. The EPROM cell requires only 12.5V for
the supervoltage and low current requirements allow for gang
programming. The EPROM cells allow for each memory loca-
tion to be tested 100%, as each location is written into, erased,
and repeatedly exercised prior to encapsulation. Each PROM
is also tested for AC performance to guarantee that after cus-
tomer programming the product will meet DC and AC specifi-
cation limits.
A read is accomplished by placing an active LOW signal on
CS
1
, and active HIGH signals on CS
2
and CS
3
. The contents
of the memory location addressed by the address line (A
0
A
10
) will become available on the output lines (O
0
O
7
).
Logic Block Diagram
Pin Configurations
C291A-1
C291A-2
C291A-3
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
PROGRAM-
MABLE
ARRAY
MULTI-
PLEXER
GND
1
2
3
4
5
6
7
8
9
10
11
12
14
13
15
16
20
19
18
17
21
24
23
22
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
A
7
O
3
V
CC
A
8
A
9
A
10
CS
1
CS
2
O
7
O
6
O
5
O
4
O
2
CS
3
28
4
5
6
7
8
9
10
1112
3 2 1
27
1314151617
26
25
24
23
22
21
20
19
O
0
18
NC
A
0
A
4
A
3
A
2
A
1
A
10
CS
1
CS
2
CS
3
NC
O
7
O
6
CS
1
CS
2
CS
3
POWER
DOWN
7C293A
Window availableon
7C291A and 7C293A
only.
DIP
LCC/PLCC (Opaque Only)
Top View
Top View
ADDRESS
DECODER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
8
A
9
A
10
A
7
COLUMN
ADDROW
7C291A
7C292A
7C293A
7C291A
7C293A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C291A-25TMB | 2K x 8 Reprogrammable PROM |
| CY7C291A-25WMB | 2K x 8 Reprogrammable PROM |
| CY7C291A-293A | 2K x 8 Reprogrammable PROM |
| CY7C291A-30DMB | 2K x 8 Reprogrammable PROM |
| CY7C291A-25QMB | 2K x 8 Reprogrammable PROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C291A-25JC | 制造商:Cypress Semiconductor 功能描述:EPROM OTP 16K-Bit 2K x 8 25ns 28-Pin PLCC |
| CY7C291A-25PC | 制造商:Cypress Semiconductor 功能描述:EPROM OTP 16K-Bit 2K x 8 25ns 24-Pin PDIP |
| CY7C291A-35DMB | 制造商:Cypress Semiconductor 功能描述: |
| CY7C291A-35JC | 制造商:Cypress Semiconductor 功能描述:EPROM OTP 16K-Bit 2K x 8 35ns 28-Pin PLCC |
| CY7C291A-35JCT | 制造商:Cypress Semiconductor 功能描述:EPROM OTP 16K-Bit 2K x 8 35ns 28-Pin PLCC T/R |
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