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參數(shù)資料
| 型號： | CY7C197-35VC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 256Kx1 Static RAM |
| 中文描述： | 256K X 1 STANDARD SRAM, 35 ns, PDSO24 |
| 封裝： | 0.300 INCH, PLASTIC, SOJ-24 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 150K |
| 代理商： | CY7C197-35VC |
256Kx1 Static RAM
CY7C197
Cypress Semiconductor Corporation
Document #: 38-05049 Rev. **
3901 North First Street
San Jose
CA 95134
408-943-2600
Revised August 24, 2001
97
Features
High speed
—12 ns
CMOS for optimum speed/power
Low active power
—880 mW
Low standby power
—220 mW
TTL-compatible inputs and outputs
Automatic power-down when deselected
Functional Description
The CY7C197 is a high-performance CMOS static RAM orga-
nized as 256K words by 1 bit. Easy memory expansion is pro-
vided by an active LOW Chip Enable (CE) and three-state driv-
ers. The CY7C197 has an automatic power-down feature,
reducing the power consumption by 75% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
IN
) is written into the memory location specified on
the address pins (A
0
through A
17
).
Reading the device is accomplished by taking chip enable
(CE) LOW while Write Enable (WE) remains HIGH. Under
these conditions the contents of the memory location specified
on the address pins will appear on the data output (D
OUT
) pin.
The output pin stays in a high-impedance state when Chip
Enable (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C197 utilizes a die coat to insure alpha immunity.
WE
GND
28
LogicBlock Diagram
Pin Configurations
1024 x 256
ARRAY
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
POWER
DOWN
WE
CE
4
5
6
7
8
9
10
11
12
3 2 1
27
26
25
24
23
22
21
20
19
18
1314151617
1
2
3
4
5
6
7
8
9
10
11
12
14
13
15
16
20
19
18
17
21
24
23
22
Top View
DIP/SOJ
7C197
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
CE
V
CC
A
17
A
16
A
15
A
14
A
13
A
12
A
11
A
10
A
9
D
IN
D
OUT
A
VC
A
3
A
4
A
5
A
6
A
7
A
8
NC
A
16
A
15
A
14
A
13
A
12
A
G
W
7C197
Top View
LCC
INPUT BUFFER
DO
DI
A
0
A
9
A
10
A
11
A
12
A
17
A
16
A
15
A
14
A
13
C
D
A
A
A
NC
NC
NC
D
OUT
A
11
A
10
C197-1
C197-2
C197-3
Selection Guide
7C197-12
12
150
30
7C197-15
15
140
30
7C197-20
20
135
30
7C197-25
25
95
30
7C197-35
35
95
30
7C197-45
45
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
30
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C197-45PC | 256Kx1 Static RAM |
| CY7C197-45VC | 256Kx1 Static RAM |
| CY7C198-20 | 32K x 8 Static RAM |
| CY7C198 | 32K x 8 Static RAM |
| CY7C198-15 | 32K x 8 Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C197-35VCT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 5V 256K-Bit 256K x 1 35ns 24-Pin SOJ T/R 制造商:Rochester Electronics LLC 功能描述:256K (256K X 1)- FAST ASYNCH SRAM - Bulk |
| CY7C197-45PC | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:256K (256K X 1)- FAST ASYNCH SRAM - Bulk |
| CY7C197-45VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C197-45VCT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| CY7C197B-12VC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 5V 256K-Bit 256K x 1 12ns 24-Pin SOJ |
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