參數(shù)資料
型號(hào): CY7C1525AV18-167BZC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
中文描述: 8M X 9 QDR SRAM, 0.5 ns, PBGA165
封裝: 15 X 17 MM, 1.40 MM HEIGHT, MO-216, FBGA-165
文件頁(yè)數(shù): 11/26頁(yè)
文件大小: 1074K
代理商: CY7C1525AV18-167BZC
PRELIMINARY
CY7C1510AV18
CY7C1525AV18
CY7C1512AV18
CY7C1514AV18
Document #: 001-06984 Rev. *B
Page 11 of 26
Write Cycle Descriptions
(CY7C1514AV18)
[3, 9]
BWS
0
BWS
1
L
BWS
2
L
BWS
3
L
K
K
Comments
L
L-H
-
During the Data portion of a Write sequence, all four bytes (D
[35:0]
) are written
into the device.
L
L
L
L
-
L-H During the Data portion of a Write sequence, all four bytes (D
[35:0]
) are written
into the device.
L
H
H
H
L-H
-
During the Data portion of a Write sequence, only the lower byte (D
[8:0]
) is written
into the device. D
[35:9]
will remain unaltered.
L-H During the Data portion of a Write sequence, only the lower byte (D
[8:0]
) is written
into the device. D
[35:9]
will remain unaltered.
-
During the Data portion of a Write sequence, only the byte (D
[17:9]
) is written into
the device. D
[8:0]
and D
[35:18]
will remain unaltered.
L-H During the Data portion of a Write sequence, only the byte (D
[17:9]
) is written into
the device. D
[8:0]
and D
[35:18]
will remain unaltered.
-
During the Data portion of a Write sequence, only the byte (D
[26:18]
) is written into
the device. D
[17:0]
and D
[35:27]
will remain unaltered.
L-H During the Data portion of a Write sequence, only the byte (D
[26:18]
) is written into
the device. D
[17:0]
and D
[35:27]
will remain unaltered.
During the Data portion of a Write sequence, only the byte (D
[35:27]
) is written into
the device. D
[26:0]
will remain unaltered.
L-H During the Data portion of a Write sequence, only the byte (D
[35:27]
) is written into
the device. D
[26:0]
will remain unaltered.
-
No data is written into the device during this portion of a write operation.
L
H
H
H
-
H
L
H
H
L-H
H
L
H
H
-
H
H
L
H
L-H
H
H
L
H
-
H
H
H
L
L-H
H
H
H
L
-
H
H
H
H
L-H
H
H
H
H
-
L-H No data is written into the device during this portion of a write operation.
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CY7C1525AV18-167BZI 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
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