參數(shù)資料
型號(hào): CY7C1471V33-133BZC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
中文描述: 2M X 36 ZBT SRAM, 6.5 ns, PBGA165
封裝: 15 X 17 MM, 1.40 MM HEIGHT, FBGA-165
文件頁(yè)數(shù): 2/30頁(yè)
文件大?。?/td> 373K
代理商: CY7C1471V33-133BZC
PRELIMINARY
CY7C1471V25
CY7C1473V25
CY7C1475V25
Document #: 38-05287 Rev. *E
Page 2 of 30
Logic Block Diagram – CY7C1471V25 (2M x 36)
C
MODE
BW
A
BW
B
WE
CE1
CE2
CE3
OE
READ LOGIC
DQs
DQP
A
DQP
B
DQP
C
DQP
D
MEMORY
ARRAY
E
INPUT
REGISTER
BW
C
BW
D
ADDRESS
REGISTER
WRITE REGISTRY
AND DATA COHERENCY
CONTROL LOGIC
BURST
LOGIC
A0'
A1'
D1
D0
Q1
Q0
A0
A1
ADV/LD
CE
ADV/LD
C
CLK
CEN
WRITE
DRIVERS
D
A
T
A
S
T
E
E
R
I
N
G
S
E
N
S
E
A
M
P
S
WRITE ADDRESS
REGISTER
A0, A1, A
O
U
T
P
U
T
B
U
F
F
E
R
S
E
ZZ
SLEEP
CONTROL
C
MODE
BW
A
BW
B
WE
CE1
CE2
CE3
OE
READ LOGIC
DQs
DQP
A
DQP
B
MEMORY
ARRAY
E
INPUT
REGISTER
ADDRESS
REGISTER
WRITE REGISTRY
AND DATA COHERENCY
CONTROL LOGIC
BURST
LOGIC
A0'
A1'
D1
D0
Q1
Q0
A0
A1
ADV/LD
CE
ADV/LD
C
CLK
CEN
WRITE
DRIVERS
D
A
T
A
S
T
E
E
R
I
N
G
S
E
N
S
E
A
M
P
S
WRITE ADDRESS
REGISTER
A0, A1, A
O
U
T
P
U
T
B
U
F
F
E
R
S
E
ZZ
SLEEP
CONTROL
Logic Block Diagram – CY7C1473V25 (4M x 18)
相關(guān)PDF資料
PDF描述
CY7C1475V33-100BGC 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
CY7C1475V33-100BGXC 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
CY7C1475V33-133BGC 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
CY7C1473V33-133BZXC 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
CY7C1473V33-100AXC 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1471V33-133BZCES 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 72MBIT 2MX36 6.5NS 165FBGA - Bulk
CY7C1471V33-133BZI 制造商:Cypress Semiconductor 功能描述:
CY7C1471XC 制造商:Cypress Semiconductor 功能描述:
CY7C14722AC 制造商:Cypress Semiconductor 功能描述:
CY7C14722BC 制造商:Cypress Semiconductor 功能描述: