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參數(shù)資料
| 型號： | CY7C1463AV33 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM) |
| 中文描述： | 36兆位（1米x 36 / 2 M中的x 18/512K × 72）流體系結(jié)構(gòu)，通過與總線延遲（帶總線延遲結(jié)構(gòu)的的36 - Mbit通過的SRAM（100萬x 36 / 2 M中的x 18/512K × 72）流的SRAM ） |
| 文件頁數(shù)： | 1/31頁 |
| 文件大?。?/td> | 1141K |
| 代理商： | CY7C1463AV33 |
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36-Mbit (1M x 36/2 M x 18/512K x 72)
Flow-Through SRAM with NoBL Architecture
CY7C1461AV33
CY7C1463AV33
CY7C1465AV33
Cypress Semiconductor Corporation
Document #: 38-05356 Rev. *F
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised July 09, 2007
Features
No Bus Latency (NoBL) architecture eliminates dead
cycles between write and read cycles
Supports up to 133-MHz bus operations with zero wait
states
— Data is transferred on every clock
Pin-compatible and functionally equivalent to ZBT
devices
Internally self timed output buffer control to eliminate the
need to use OE
Registered inputs for flow through operation
Byte Write capability
3.3V/2.5V IO power supply
Fast clock-to-output times
— 6.5 ns (for 133-MHz device)
Clock Enable (CEN) pin to enable clock and suspend
operation
Synchronous self timed writes
Asynchronous Output Enable
CY7C1461AV33, CY7C1463AV33 available in
JEDEC-standard Pb-free 100-pin TQFP package, Pb-free
and non-Pb-free 165-Ball FBGA package. CY7C1465AV33
available in Pb-free and non-Pb-free 209-Ball FBGA
package
Three chip enables for simple depth expansion
Automatic Power down feature available using ZZ mode or
CE deselect
IEEE 1149.1 JTAG-Compatible Boundary Scan
Burst Capability — linear or interleaved burst order
Low standby power
Functional Description
[1]
The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33 is a
3.3V, 1M x 36/2M x 18/512K x 72 Synchronous Flow -through
Burst SRAM designed specifically to support unlimited true
back-to-back Read/Write operations without the insertion of
wait states. The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33
is equipped with the advanced No Bus Latency (NoBL) logic
required to enable consecutive Read/Write operations with
data being transferred on every clock cycle. This feature
dramatically improves the throughput of data through the
SRAM, especially in systems that require frequent Write-Read
transitions.
All synchronous inputs pass through input registers controlled
by the rising edge of the clock. The clock input is qualified by
the Clock Enable (CEN) signal, which when deasserted
suspends operation and extends the previous clock cycle.
Maximum access delay from the clock rise is 6.5 ns (133-MHz
device).
Write operations are controlled by the two or four Byte Write
Select (BW
X
) and a Write Enable (WE) input. All writes are
conducted with on-chip synchronous self timed write circuitry.
Three synchronous Chip Enables (CE
1
, CE
2
, CE
3
) and an
asynchronous Output Enable (OE) provide for easy bank
selection and output tri-state control. To avoid bus contention,
the output drivers are synchronously tri-stated during the data
portion of a write sequence.
Selection Guide
133 MHz
6.5
310
120
100 MHz
8.5
290
120
Unit
ns
mA
mA
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Note:
1. For best-practices recommendations, please refer to the Cypress application note
System Design Guidelines
on www.cypress.com.
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| CY7C1465AV33 | 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1463AV33-117AXC | 功能描述:靜態(tài)隨機(jī)存取存儲器 2Mx18 3.3V NoBL FT 靜態(tài)隨機(jī)存取存儲器 COM RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1463AV33-133AXC | 功能描述:靜態(tài)隨機(jī)存取存儲器 2Mx18 3.3V NoBL FT 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1463AV33-133AXI | 功能描述:靜態(tài)隨機(jī)存取存儲器 2Mx18 3.3V NoBL-FT 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1463AV33-133CKJ | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1463BV33-133AXI | 功能描述:靜態(tài)隨機(jī)存取存儲器 36Mb (2 M x 18) 靜態(tài)隨機(jī)存取存儲器 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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