參數(shù)資料
型號: CY7C1386F-200BGC
廠商: Cypress Semiconductor Corp.
英文描述: 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
中文描述: 18兆位(為512k × 36 / 1兆位× 18)流水線雙氰胺同步靜態(tài)存儲器
文件頁數(shù): 24/30頁
文件大?。?/td> 974K
代理商: CY7C1386F-200BGC
CY7C1386D, CY7C1386F
CY7C1387D, CY7C1387F
Document Number: 38-05545 Rev. *E
Page 24 of 30
ZZ Mode Timing
[30, 31]
Switching Waveforms
(continued)
tZZ
I
SUPPLY
CLK
ZZ
tZZREC
ALL INPUTS
(except ZZ)
DON’T CARE
IDDZZ
tZZI
tRZZI
Outputs (Q)
High-Z
DESELECT or READ Only
Notes
30.Device must be deselected when entering ZZ sleep mode. See cycle descriptions table for all possible signal conditions to deselect the device.
31.DQs are in high-Z when exiting ZZ sleep mode.
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