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參數(shù)資料
| 型號： | CY7C1380C-167BZC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 18-Mb (512K x 36/1M x 18) Pipelined SRAM |
| 中文描述： | 512K X 36 CACHE SRAM, 3.4 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1.20 MM HEIGHT, FBGA-165 |
| 文件頁數(shù)： | 11/36頁 |
| 文件大?。?/td> | 788K |
| 代理商： | CY7C1380C-167BZC |
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CY7C1380C
CY7C1382C
Document #: 38-05237 Rev. *D
Page 11 of 36
V
DDQ
4,11,20,27,54,
61,70,
77
A1,A7,F1,F7,
J1,J7,M1,M7,
U1,U7
C3,C9,D3,D9,
E3,E9,
F3,F9,G3,
G9,J3,J9,
K3,K9,L3,
L9,M3,M9,N3,
N9
I/O Power Sup-
ply
Power supply for the I/O circuitry
.
MODE
31
R3
R1
Input-
Static
Selects Burst Order
. When tied to GND selects
linear burst sequence. When tied to V
DD
or left
floating selects interleaved burst sequence. This is
a strap pin and should remain static during device
operation. Mode Pin has an internal pull-up.
TDO
-
U5
P7
JTAG serial
output
Synchronous
Serial data-out to the JTAG circuit
. Delivers data
on the negative edge of TCK. If the JTAG feature is
not being utilized, this pin should be left uncon-
nected. This pin is not available on TQFP
packages.
TDI
-
U3
P5
JTAG serial
input
Synchronous
Serial data-In to the JTAG circuit
. Sampled on the
rising edge of TCK. If the JTAG feature is not being
utilized, this pin can be left floating or connected to
V
DD
through a pull up resistor. This pin is not avail-
able on TQFP packages.
TMS
-
U2
R5
JTAG serial
input
Synchronous
Serial data-In to the JTAG circuit
. Sampled on the
rising edge of TCK. If the JTAG feature is not being
utilized, this pin can be disconnected or connected
to V
DD
. This pin is not available on TQFP packages.
TCK
-
U4
R7
JTAG-Clock
Clock input to the JTAG circuitry
. If the JTAG
feature is not being utilized, this pin must be
connected to V
SS
. This pin is not available on TQFP
packages.
NC
1,2,3,6,7,
14,16,25,
28,29,30,
38,39,
51,52,53,
56,57,66,
75,78,79,
95,96
B1,B7,
C1,C7,
D2,D4,
D7,E1,
E6,H2,
F2,G1,
G6,H7,
J3,J5,K1,
K6,L4,L2,L7,
M6,
N2,L7,P1,P6,
R1,
R5,R7,
T1,T4,U6
A5,B1,B4,
C1,C2,C10,D1
,D10,
E1,E10,F1,
F10,G1,
G10,H1,H3,H9
,H10,J2,J11,
K2,
K11,L2,L1,M2,
M11,
N2,N10,N5,N7
N11,P1,A1,
B11,
P2,R2
-
No Connects
. Not internally connected to the die.
CY7C1382C:Pin Definitions
(continued)
Name
TQFP
BGA
fBGA
I/O
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1380C-167BZI | 18-Mb (512K x 36/1M x 18) Pipelined SRAM |
| CY7C1380D | 18-Mbit (512K x 36/1M x 18) Pipelined SRAM(18-Mb (512K x 36/1M x 18)管道式SRAM) |
| CY7C1381D | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
| CY7C1381D-100AXC | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
| CY7C1381D-100AXI | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1380C-167BZI | 功能描述:IC SRAM 512KX36 SYNC 165-FBGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR) |
| CY7C1380C-200AC | 制造商:Rochester Electronics LLC 功能描述:16MB (512KX36) 3.3V SYNC-PIPE (SINGLE CYCLE DESELECT) SRAM - Bulk |
| CY7C1380C225AC | 制造商:Cypress 功能描述:_ |
| CY7C1380C-225AC | 制造商:Cypress 功能描述:_ 制造商:Cypress Semiconductor 功能描述: |
| CY7C1380CV25-167AC | 制造商:Cypress Semiconductor 功能描述: |
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