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參數(shù)資料
| 型號： | CY7C1364V25 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 512K x 18 Pipelined SRAM(512K x 18 流水線式 SRAM) |
| 中文描述： | 流水線為512k × 18的SRAM（為512k × 18流水線式的SRAM） |
| 文件頁數(shù)： | 1/31頁 |
| 文件大?。?/td> | 414K |
| 代理商： | CY7C1364V25 |
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PRELIMINARY
256K x 36/256K x 32/512K x 18 Pipelined SRAM
CY7C1360V25
CY7C1362V25
CY7C1364V25
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
December 3, 1999
408-943-2600
Features
Supports 200-MHz bus
Fully registered inputs and outputs for pipelined
operation
Single 2.5V power supply
Fast clock-to-output times
—3.1 ns (for 200-MHz device)
—3.5 ns (for 166-MHz device)
—4.0 ns (for 133-MHz device
—5.0 ns (for 100-MHz device
User-selectable burst counter supporting Intel
Pentium interleaved or linear burst sequences
Separate processor and controller address strobes
Synchronous self-timed writes
Asynchronous output enable
Available as a 100-pin TQFP or 119 BGA
“ZZ” Sleep Mode option and Stop Clock option
Functional Description
The CY7C1360V25, CY7C1364V25 and CY7C1362V25 are
2.5V, 256K x 36, 256K x 32 and 512K x 18 synchronous-pipe-
lined cache SRAM, respectively. They are designed to support
zero wait state secondary cache with minimal glue logic.
All synchronous inputs pass through input registers controlled
by the rising edge of the clock. All data outputs pass through
output registers controlled by the rising edge of the clock. Max-
imum access delay from the clock rise is 3.1 ns (200-MHz
device).
The CY7C1360V25/CY7C1364V25/CY7C1362V25 supports
either the interleaved burst sequence used by the Intel Pen-
tium processor or a linear burst sequence used by processors
such as the PowerPC. The burst sequence is selected
through the MODE pin. Accesses can be initiated by assert-
ing either the Processor Address Strobe (ADSP) or the Con-
troller Address Strobe (ADSC) at clock rise. Address advance-
ment through the burst sequence is controlled by the ADV
input. A 2-bit on-chip wraparound burst counter captures the
first address in a burst sequence and automatically increments
the address for the rest of the burst access.
Byte write operations are qualified with the Byte Write Select
(BW
a,b,c,d
for 1360V25/1364V25 and BW
a,b
for 1362V25) in-
puts. A Global Write Enable (GW) overrides all byte write in-
puts and writes data to all four bytes. All writes are conducted
with on-chip synchronous self-timed write circuitry.
Three synchronous Chip Selects (CE
1
, CE
2
, CE
3
) and an
asynchronous Output Enable (OE) provide for easy bank se-
lection and output three-state control. In order to provide prop-
er data during depth expansion, OE is masked during the first
clock of a read cycle when emerging from a deselected state.
Intel and Pentium are registered trademarks of Intel Corporation.
PowerPC is a trademark of IBM Corporation.
CLK
A
x
GW
CE
1
CE
2
BWE
BW
x
MODE
ADSP
ADSC
CE
OE
O
256Kx36/
512Kx18
MEMORY
ARRAY
C
Logic Block Diagram
DQ
x
DP
x
DaD
Q
CE
CONTROL
and WRITE
LOGIC
3
R
a
ADV
1360V25
A
[17:0]
DQ
a,b,c,d
DP
a,b,c,d
BW
a,b,c,d
1362V25
A
[18:0]
DQ
a,b
DP
a,b
BW
a,b
A
X
DQ
X
DP
X
BW
X
ZZ
1364V25
A
[18:0]
DQ
a,b
NC
BW
a,b
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1363B-133BGI | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM |
| CY7C1361B-100AC | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM |
| CY7C1361B-100AI | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM |
| CY7C1363B-117BGI | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM |
| CY7C1363B-117BZC | 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C136-55JC | 制造商:Cypress Semiconductor 功能描述:5V 2KX8 52-PIN DUAL PORT SRAM-MASTER 制造商:Cypress Semiconductor 功能描述:CY7C136 Series 16 kb (2 K x 8) 5 V 55 ns Dual-Port Static RAM - PLCC-52 制造商:Cypress Semiconductor 功能描述:2Kx8 static RAM,CY7C136-55JC 16K PLCC52 |
| CY7C136-55JCT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C136-55JI | 功能描述:IC SRAM 16KB DUAL 52-PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR) |
| CY7C136-55JIT | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
| CY7C136-55JXC | 功能描述:靜態(tài)隨機存取存儲器 5V 2Kx8 COM Dual-Port 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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