參數(shù)資料
型號(hào)： CY7C1360B-166BZI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： DRAM
英文描述： 9-Mbit (256K x 36/512K x 18) Pipelined SRAM
中文描述： 256K X 36 CACHE SRAM, 3.5 ns, PBGA165
封裝： 13 X 15 MM, 1.20 MM HEIGHT, FBGA-165
文件頁(yè)數(shù)： 8/34頁(yè)
文件大?。?/td> 895K
代理商： CY7C1360B-166BZI
CY7C1360B
CY7C1362B
Document #: 38-05291 Rev. *C
Page 8 of 34
V
SSQ
5,10,21,26,
55,60,71,
76
5,10,21,26,
55,60,71,
76
-
-
I/O Ground
Ground for the I/O circuitry
.
V
DDQ
4,11,20,27,
54,61,70,
77
4,11,20,27,
54,61,70,
77
A1,F1,J1,
M1,U1,
A7,F7,J7,
M7,U7
C3,C9,D3,
D9,E3,E9,F
3,F9,G3,
G9,J3,J9,
K3,K9,L3,
L9,M3,M9,
N3,N9
I/O Power
Supply
Power supply for the I/O circuitry
.
MODE
31
31
R3
R1
Input-
Static
Selects Burst Order
. When tied to GND selects
linear burst sequence. When tied to V
DD
or left
floating selects interleaved burst sequence. This is
a strap pin and should remain static during device
operation. Mode pin has an internal pull-up.
TDO
-
-
U5
P7
JTAG serial
output
Synchronous
Serial data-out to the JTAG circuit
. Delivers data
on the negative edge of TCK. If the JTAG feature is
not being utilized, this pin should be disconnected.
This pin is not available on TQFP packages.
TDI
-
-
U3
P5
JTAG serial
input
Synchronous
Serial data-In to the JTAG circuit
. Sampled on the
rising edge of TCK. If the JTAG feature is not being
utilized, this pin can be disconnected or connected
to V
DD
. This pin is not available on TQFP packages.
TMS
-
-
U2
R5
JTAG serial
input
Synchronous
Serial data-In to the JTAG circuit
. Sampled on the
rising edge of TCK. If the JTAG feature is not being
utilized, this pin can be disconnected or connected
to V
DD
. This pin is not available on TQFP packages.
TCK
-
-
U4
R7
JTAG-Clock
Clock input to the JTAG circuitry
. If the JTAG
feature is not being utilized, this pin must be
connected to V
SS
. This pin is not available on TQFP
packages.
NC
14,16,66,
42,39,38
14,16,38,
39,42,43,
66,
B1,C1,
R1,T1,T2,
J3,D4,
L4,5J,5R,
6T,6U,
B7,C7,
R7
A11,B1,C2,
C10,H1,H3,
H9,H10,
N2,N5,N7,
N10,P1,A1,
B11,P2,R2,
N6
-
No Connects
. Not internally connected to the die
CY7C1360B–Pin Definitions
(continued)
Name
TQFP
3-Chip
Enable
TQFP
2-Chip
Enable
BGA
fBGA
I/O
Description
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