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參數(shù)資料
| 型號(hào)： | CY7C1350F-133AI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture |
| 中文描述： | 128K X 36 ZBT SRAM, 4 ns, PQFP100 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大?。?/td> | 539K |
| 代理商： | CY7C1350F-133AI |
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CY7C1350F
Document #: 38-05305 Rev. *A
Page 7 of 16
Partial Truth Table for Read/Write
[2, 3, 9]
Function
WE
H
BW
D
X
BW
C
X
BW
B
X
BW
A
X
Read
Write
No bytes written
Write Byte A
(DQ
A
and
DQP
A
)
Write Byte B
(DQ
B
and
DQP
B
)
Write Bytes A, B
Write Byte C
(DQ
C
and
DQP
C
)
Write Bytes C,A
L
H
H
H
H
L
H
H
H
L
L
H
H
L
H
L
H
H
L
L
L
H
L
H
H
L
H
L
H
L
Write Bytes C, B
L
H
L
L
H
Write Bytes C, B, A
Write Byte D
(DQ
D
and
DQP
D
)
Write Bytes D, A
L
H
L
L
L
L
L
H
H
H
L
L
H
H
L
Write Bytes D, B
L
L
H
L
H
Write Bytes D, B, A
L
L
H
L
L
Write Bytes D, C
L
L
L
H
H
Write Bytes D, C, A
L
L
L
H
L
Write Bytes D, C, B
L
L
L
L
H
Write All Bytes
L
L
L
L
L
Note:
9. Table only lists a partial listing of the byte write combinations. Any combination of BW[A:D] is valid. Appropriate write will be done on which byte write is active.
ZZ Mode Electrical Characteristics
Parameter
I
DDZZ
t
ZZS
t
ZZREC
t
ZZI
t
RZZI
Description
Test Conditions
Min.
Max.
40
2t
CYC
Unit
mA
ns
ns
ns
ns
Snooze mode standby current
Device operation to ZZ
ZZ recovery time
ZZ active to snooze current
ZZ inactive to exit snooze current
ZZ > V
DD
0.2V
ZZ > V
DD
0.2V
ZZ < 0.2V
This parameter is sampled
This parameter is sampled
2t
CYC
2t
CYC
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1350F-200AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 128K x 36 2.8ns 100-Pin TQFP |
| CY7C1350F-200ACT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 128K x 36 2.8ns 100-Pin TQFP T/R |
| CY7C1350F-250AXI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1350G-100AXC | 制造商:MAJOR 功能描述: |
| CY7C1350G133AXC | 制造商:Cypress Semiconductor 功能描述: |
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