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參數(shù)資料
| 型號： | CY7C1347C-200BGC |
| 英文描述： | x36 Fast Synchronous SRAM |
| 中文描述： | x36快速同步SRAM |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 293K |
| 代理商： | CY7C1347C-200BGC |
CY7C1347C/GVT71128DA36
CY7C1327C/GVT71256DA18
14
Identification Register Definitions
Instruction Field
512K x 18
Description
REVISION NUMBER
(31:28)
XXXX
Reserved for revision number.
DEVICE DEPTH
(27:23)
00111
Defines depth of words.
DEVICE WIDTH
(22:18)
00011
Defines width of bits.
RESERVED
(17:12)
XXXXXX
Reserved for future use.
CYPRESS JEDEC ID CODE (11:1)
00011100100
Allows unique identification of DEVICE vendor.
ID Register Presence
Indicator (0)
1
Indicates the presence of an ID register.
Scan Register Sizes
Register Name
Bit Size (x18)
Instruction
3
Bypass
1
ID
32
Boundary Scan
51
Instruction Codes
Instruction
Code
Description
EXTEST
000
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. Forces all device outputs to High-Z state. This instruction is not
IEEE 1149.1-compliant.
IDCODE
001
Preloads ID register with vendor ID code and places it between TDI and
TDO. This instruction does not affect device operations.
SAMPLE-Z
010
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. Forces all device outputs to High-Z state.
RESERVED
011
Do not use these instructions; they are reserved for future use.
SAMPLE/PRELOAD
100
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. This instruction does not affect device operations. This instruction
does not implement IEEE 1149.1 PRELOAD function and is therefore not
1149.1-compliant.
RESERVED
101
Do not use these instructions; they are reserved for future use.
RESERVED
110
Do not use these instructions; they are reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This instruction does not
affect device operations.
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PDF描述 |
|---|---|
| CY7C1347C-225BGC | x36 Fast Synchronous SRAM |
| CY7C1347C-250AC | x36 Fast Synchronous SRAM |
| CY7C1347C-250BGC | x36 Fast Synchronous SRAM |
| GVT1256DA18B-4 | x18 Fast Synchronous SRAM |
| GVT1256DA18B-4.4 | x18 Fast Synchronous SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1347D-166AC | 制造商:Rochester Electronics LLC 功能描述:4MB (128K X 36) 3.3V SYNC PIPELINE SRAM 1.5/.5 NS SETUP/HOLD - Bulk |
| CY7C1347D-200AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1347D-250AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1347DP | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1347F-100AC | 功能描述:IC SRAM 4.5MBIT 100MHZ 100LQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應商設備封裝:48-TSOP 包裝:托盤 |
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