參數(shù)資料
型號(hào)： CY7C1245V18-300BZXC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
中文描述： 1M X 36 QDR SRAM, 0.45 ns, PBGA165
封裝： 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
文件頁(yè)數(shù)： 10/28頁(yè)
文件大?。?/td> 1042K
代理商： CY7C1245V18-300BZXC
CY7C1241V18
CY7C1256V18
CY7C1243V18
CY7C1245V18
Document Number: 001-06365 Rev. *C
Page 10 of 28
Application Example
Figure 1
shows the use of 4 QDR-II+ SRAMs in an application.
Figure 1. Application Example
Truth Table
The truth table for the CY7C1241V18, CY7C1256V18, CY7C1243V18, and CY7C1245V18 follows.
[2, 3, 4, 5, 6, 7]
Operation
K
RPS WPS
DQ
DQ
DQ
DQ
Write Cycle:
Load address on the
rising edge of K; input
write data on two
consecutive K and K
rising edges.
L-H
H
[8]
L
[9]
D(A) at K(t + 1)
↑
D(A + 1) at K(t +1)
↑
D(A + 2) at K(t + 2)
↑
D(A + 3) at K(t + 2)
↑
Read Cycle:
(2.0 cycle Latency)
Load address on the
rising edge of K; wait
two cycle; read data
on two consecutive K
and K rising edges.
L-H
L
[9]
X
Q(A) at K(t + 2)
↑
Q(A + 1) at K(t + 2)
↑
Q(A + 2) at K(t + 3)
↑
Q(A + 3) at K(t + 3)
↑
NOP: No Operation
L-H
H
H
D = X
Q = High-Z
D = X
Q = High-Z
D = X
Q = High-Z
D = X
Q = High-Z
Standby: Clock
Stopped
Stopped X
X
Previous State
Previous State
Previous State
Previous State
BUS MASTER
(CPU or ASIC)
DATA IN
DATA OUT
Address
Source K
Source K
Vt
Vt
Vt
R
R
CLKIN/CLKIN
D
A
K
SRAM #4
RQ = 250
ohms
ZQ
CQ/CQ
Q
K
RPS WPS BWS
D
A
K
SRAM #1
RQ = 250
ohms
ZQ
CQ/CQ
Q
K
RPS WPS BWS
RPS
WPS
BWS
R = 50ohms, Vt = VDDQ
R
Notes
2. X = “Don't Care,” H = Logic HIGH, L = Logic LOW,
↑
represents rising edge.
3. Device will power-up deselected and the outputs in a tri-state condition.
4. “A” represents address location latched by the devices when transaction was initiated. A + 1, A + 2, and A + 3 represents the address sequence in the burst.
5. “t” represents the cycle at which a Read/write operation is started. t + 1, t + 2, and t + 3 are the first, second and third clock cycles respectively succeeding the
“t” clock cycle.
6. Data inputs are registered at K and K rising edges. Data outputs are delivered on K and K rising edges.
7. It is recommended that K = K = HIGH when clock is stopped. This is not essential, but permits most rapid restart by overcoming transmission line charging
symmetrically.
8. If this signal was LOW to initiate the previous cycle, this signal becomes a “Don’t Care” for this operation.
9. This signal was HIGH on previous K clock rise. Initiating consecutive Read or Write operations on consecutive K clock rises is not permitted. The device will
ignore the second Read or Write request.
[+] Feedback
相關(guān)PDF資料
PDF描述
CY7C1245V18-300BZXI 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1256V18 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1256V18-300BZC 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1256V18-300BZI 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1256V18-300BZXC 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1245V18-375BZC 制造商:Cypress Semiconductor 功能描述:
CY7C1245XC 制造商:Cypress Semiconductor 功能描述:
CY7C12481KV18-400BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2M X 18 400MHz DDR II+ 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C12481KV18-400BZXC 功能描述:IC SRAM 36MBIT 400MHZ 165-FPBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁(yè)面:1445 (CN2011-ZH PDF)
CY7C1248KV18-400BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 36MB (2Mx18) 1.8v 400MHz DDR II 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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