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參數(shù)資料
| 型號： | CY7C1062AV33-12BGI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | The CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. |
| 中文描述： | 512K X 32 STANDARD SRAM, 12 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 188K |
| 代理商： | CY7C1062AV33-12BGI |
CY7C1062AV33
Document #: 38-05137 Rev. *D
Page 4 of 9
AC Switching Characteristics
Over the Operating Range
[4]
Parameter
Read Cycle
t
power
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
t
DBE
t
LZBE
t
HZBE
Write Cycle
[8, 9]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
t
BW
Description
–
8
–
10
–
12
Unit
Min.
Max.
Min.
Max.
Min.
Max.
V
CC
(typical) to the first access
[5]
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
1
, CE
2
,
or CE
3
LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
[6]
OE HIGH to High-Z
[6]
CE
1
, CE
2
,
or CE
3
LOW to Low-Z
[6]
CE
1
, CE
2
,
or CE
3
HIGH to High-Z
[6]
CE
1
, CE
2
,
or CE
3
LOW to Power-up
[7]
CE
1
, CE
2
,
or CE
3
HIGH to Power-down
[7]
Byte Enable to Data Valid
Byte Enable to Low-Z
[6]
Byte Disable to High-Z
[6]
1
8
1
10
1
12
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
10
12
3
3
3
8
5
10
5
12
6
1
1
1
5
5
6
3
3
3
5
5
6
0
0
0
8
5
10
5
12
6
1
1
1
5
5
6
Write Cycle Time
CE
1
, CE
2
, or CE
3
LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE HIGH to Low-Z
[6]
WE LOW to High-Z
[6]
Byte Enable to End of Write
8
6
6
0
0
6
5
0
3
10
7
7
0
0
7
5.5
0
3
12
8
8
0
0
8
6
0
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
5
6
6
7
8
Notes:
4.
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
/I
and transmission line loads. Test conditions for the read cycle use output loading as shown in (a) of AC Test Loads, unless specified otherwise.
This part has a voltage regulator that steps down the voltage from 3V to 2V internally. t
time has to be provided initially before a read/write operation is started.
t
, t
, t
, t
, and t
, t
LZCE
, t
LZWE
, and t
LZBE
are specified with a load capacitance of 5 pF as in (b) of AC Test Loads. Transition is measured
± 200 mV from steady-state voltage.
These parameters are guaranteed by design and are not tested.
The internal write time of the memory is defined by the overlap of CE1 LOW, CE 2 HIGH, CE3 LOW, and WE LOW. The chip enables must be active and WE
must be LOW to initiate a write, and the transition of any of these signals can terminate the write. The input data set-up and hold timing should be referenced
to the leading edge of the signal that terminates the write.
The minimum write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of t
HZWE
and t
SD
.
5.
6.
7.
8.
9.
3.0V
3.0V
t
CDR
V
DR
> 2V
DATA RETENTION MODE
t
R
CE
V
CC
Data Retention Waveform
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1062AV33-8BGC | The CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. |
| CY7C1062AV33-8BGI | The CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. |
| CY7C1062AV33-10BGC | The CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. |
| CY7C1062AV33-10BGI | The CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. |
| CY7C1062DV33 | 16-Mbit (512K X 32) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1062AV33-15BGC | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 3.3V 16MBIT 512KX32 15NS 119BGA - Bulk |
| CY7C1062AV33-15BGI | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 3.3V 16MBIT 512KX32 15NS 119BGA - Bulk |
| CY7C1062DV33-10BGI | 功能描述:靜態(tài)隨機(jī)存取存儲器 16-Mbit (512K x 32) 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1062DV33-10BGIT | 功能描述:靜態(tài)隨機(jī)存取存儲器 16Mb 512Kx32 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1062DV33-10BGXES | 制造商:Cypress Semiconductor 功能描述: |
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