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參數(shù)資料
| 型號： | CY7C1059DV33-10BAXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 8-Mbit (1M x 8) Static RAM |
| 中文描述： | 1M X 8 STANDARD SRAM, 10 ns, PBGA36 |
| 封裝： | 7 X 8.50 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-36 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 469K |
| 代理商： | CY7C1059DV33-10BAXI |
PRELIMINARY
8-Mbit (1M x 8) Static RAM
CY7C1059DV33
Cypress Semiconductor Corporation
Document #: 001-00061 Rev. *B
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised July 21, 2006
Features
High speed
— t
AA
= 10 ns
Low active power
— I
CC
= 110 mA
Low CMOS standby power
— I
SB2
= 20 mA
2.0V data retention
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in lead-free 36-ball FBGA and 44-pin TSOP II
ZS44 packages
Functional Description
[1]
The CY7C1059DV33 is a high-performance CMOS Static
RAM organized as 1M words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and tri-state drivers. Writing
to the device is accomplished by taking Chip Enable (CE) and
Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O
0
through I/O
7
) is then written into the location specified on the
address pins (A
0
through A
19
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a Write
operation (CE LOW, and WE LOW).
The CY7C1059DV33 is available in 36-ball FBGA and 44-pin
TSOP II package with center power and ground (revolutionary)
pinout.
Note:
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
A
A
Logic Block Diagram
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
COLUMN
R
S
INPUT
BUFFER
POWER
DOWN
WE
OE
I/O
0
I/O
1
I/O
2
I/O
3
1M x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
1
A
1
A
1
CE
A
1
A
1
A
1
A
1
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1059DV33 | 8-Mbit (1M x 8) Static RAM |
| CY7C1059DV33-10ZSXI | 8-Mbit (1M x 8) Static RAM |
| CY7C1061AV25 | 1M x 16 Static RAM |
| CY7C1061AV25-10BAC | 1M x 16 Static RAM |
| CY7C1061AV25-10BAI | 1M x 16 Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1059DV33-10ZSXES | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1059DV33-10ZSXI | 功能描述:靜態(tài)隨機(jī)存取存儲器 8MB (1Mx8) 3.3v 10ns Fast Async 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1059DV33-10ZSXIT | 功能描述:靜態(tài)隨機(jī)存取存儲器 8M FAST ASYNC HI SPD 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1059DV33-12ZSXI | 功能描述:靜態(tài)隨機(jī)存取存儲器 8M FAST ASYNC HI SPD 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1059DV33-12ZSXIT | 功能描述:靜態(tài)隨機(jī)存取存儲器 8M FAST ASYNC HI SPD 靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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