參數(shù)資料
型號(hào)： CY7C1049BV33L-17ZC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： GIGATRUE 550 CAT6 MOLDED COMPONENT, RED 5FT
中文描述： 512K X 8 STANDARD SRAM, 17 ns, PDSO44
封裝： TSOP2-44
文件頁數(shù)： 1/10頁
文件大小： 165K
代理商： CY7C1049BV33L-17ZC
512K x 8 Static RAM
CY7C1049BV33
Cypress Semiconductor Corporation
Document #: 38-05139 Rev. *A
3901 North First Street
San Jose
CA 95134
Revised September 13, 2002
408-943-2600
049BV33
Features
High speed
—t
AA
= 15 ns
Low active power
—504 mW (max.)
Low CMOS standby power (Commercial L version)
—1.8 mW (max.)
2.0V Data Retention (660
μ
W at 2.0V retention)
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Functional Description
[1]
The CY7C1049BV33 is a high-performance CMOS Static
RAM organized as 524,288 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers. Writ-
ing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. Data on the eight I/O pins
(I/O
0
through I/O
7
) is then written into the location specified on
the address pins (A
0
through A
18
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1049BV33 is available in a standard 400-mil-wide
36-pin SOJ and 44-pin TSOPII packages with center power
and ground (revolutionary) pinout.
Pin Configuration
SOJ
1
A
1
A
Logic Block Diagram
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
COLUMN
DECODER
R
S
INPUT BUFFER
POWER
DOWN
WE
OE
I/O
0
I/O
1
I/O
2
I/O
3
512K x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
1
A
1
A
1
CE
A
1
A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
23
22
24
28
27
26
25
29
32
31
30
Top View
33
36
35
34
16
17
21
20
GND
I/O
2
I/O3
A
1
A
2
A
3
A
4
CE
A
5
A
6
A
7
A
8
A
9
WE
V
CC
I/O
5
I/O
4
A
18
A
17
A
16
A
15
OE
I/O
7
I/O
6
A
12
A
11
A
14
A
13
A
0
I/O
0
I/O
1
V
CC
A
1
18
19
GND
A
10
NC
NC
Top View
TSOP II
WE
A
5
A
6
A
7
A
8
A
9
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
31
30
32
36
35
34
33
37
40
39
38
41
44
43
42
16
17
29
28
V
CC
V
SS
I/O
2
I/O
3
A
0
A
1
A
2
A
3
A
4
V
SS
V
CC
I/O
5
I/O
4
A
14
A
13
A
12
A
11
A
10
NC
NC
NC
A
17
A
16
A
15
OE
I/O
7
I/O
6
CE
I/O
0
I/O
1
18
19
20
21
27
26
25
24
22
23
NC
NC
A
18
NC
NC
NC
Selection Guide
-12
12
200
220
8
0.5
-15
15
180
200
8
0.5
-17
17
170
180
8
0.5
-20
20
160
170
8
0.5
-25
25
150
170
8
0.5
Maximum Access Time (ns)
Maximum Operating Current (mA) Comm
’
l
Ind
’
l
Com
’
l/Ind
’
l
Com
’
l
Maximum CMOS Standby
Current (mA)
L
Note:
1.
For guidelines on SRAM system design, please refer to the
‘
System Design Guidelines
’
Cypress application note, available on the internet at www.cypress.com.
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CY7C1049CV33-10VC 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY7C1049CV33-10VCT 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY7C1049CV33-10VXA 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4096KB 10ns 95mA RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1049CV33-10VXAKJ 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY7C1049CV33-10VXAT 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4096KB 10ns 95mA RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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