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參數(shù)資料
| 型號： | CY7C1046BN-15VC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 1M x 4 Static RAM |
| 中文描述： | 1M X 4 STANDARD SRAM, 15 ns, PDSO32 |
| 封裝： | 0.400 INCH, SOJ-32 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 286K |
| 代理商： | CY7C1046BN-15VC |
1M x 4 Static RAM
CY7C1046BN
Cypress Semiconductor Corporation
Document #: 001-11924 Rev. **
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised November 30, 2006
Features
Low active power
— 825 mW (max)
Low CMOS standby power
— 44 mW (max)
2.0V data retention (400
μ
W at 2.0V retention)
Automatic power down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in non Pb-free 400 mil wide 32-pin SOJ package
Functional Description
The CY7C1046BN is a high performance CMOS static RAM
organized as 1,048,576 words by 4 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and tri-state drivers.
You write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the four IO pins (IO
0
through IO
3
) is then written into the location specified on the
address pins (A
0
through A
19
).
You read from the device by taking Chip Enable (CE) and
Output Enable (OE) LOW while forcing Write Enable (WE)
HIGH. Under these conditions, the contents of the memory
location specified by the address pins appears on the IO pins.
The four input and output pins (IO
0
through IO
3
) are placed in
a high impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or when the write
operation is active (CE LOW, and WE LOW).
The CY7C1046BN is available in a standard 400-mil-wide
32-pin SOJ package with center power and ground (revolu-
tionary) pinout.
1
A
1
A
Logic Block Diagram
Pin Configuration
SOJ
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
COLUMN
DECODER
R
S
INPUT BUFFER
POWER
DOWN
WE
OE
IO
0
IO
1
1M x 4
ARRAY
IO
3
IO
2
A
0
A
1
A
1
A
1
CE
A
1
A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
21
20
22
25
24
23
28
27
26
TOP VIEW
29
32
31
30
14
15
19
18
GND
IO
1
A
1
A
2
A
3
A
4
CE
A
5
A
6
A
7
A
8
A
9
WE
V
CC
IO
2
A
18
A
17
A
16
A
15
OE
IO
3
A
12
A
11
A
14
A
13
1046B–1
A
0
IO
0
V
CC
1046B–2
A
1
16
17
GND
A
10
NC
A
19
A
1
Selection Guide
7C1046BN-15
15
150
8
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
[+] Feedback
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|---|---|
| CY7C1046BV33-10 | 1M x 4 Static RAM |
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| CY7C1046BV33-12VC | 1M x 4 Static RAM |
| CY7C1046BV33-15 | 1M x 4 Static RAM |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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