參數(shù)資料
型號: CY7C1041V33L-15ZC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 256K x 16 Static RAM
中文描述: 256K X 16 STANDARD SRAM, 15 ns, PDSO44
封裝: TSOP2-44
文件頁數(shù): 6/11頁
文件大?。?/td> 187K
代理商: CY7C1041V33L-15ZC
CY7C1041BV33
Document #: 38-05168 Rev. **
Page 6 of 11
Data Retention Waveform
1041BV33
3.0V
3.0V
t
CDR
V
DR
> 2V
DATA RETENTION MODE
t
R
CE
V
CC
Switching Waveforms
Notes:
11.
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE transition LOW.
Device is continuously selected. OE, CE, BHE and/or BHE = V
IL
.
Read Cycle No. 1
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
1041BV33-6
ADDRESS
DATA OUT
[11, 12]
Read Cycle No. 2(OEControlled)
1041BV33-7
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZBE
t
PD
HIGH
OE
CE
ICC
I
ISB
I
IMPEDANCE
ADDRESS
DATA OUT
V
CC
SUPPLY
CURRENT
t
DBE
t
LZBE
t
HZCE
BHE, BLE
[12, 13]
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