參數(shù)資料
型號： CY7C1041BNV33L-15ZXC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 256K x 16 Static RAM
中文描述： 256K X 16 STANDARD SRAM, 15 ns, PDSO44
封裝： LEAD FREE, TSOP2-44
文件頁數(shù)： 1/8頁
文件大?。?/td> 412K
代理商： CY7C1041BNV33L-15ZXC
256K x 16 Static RAM
Functional Description
CY7C1041BNV33
Cypress Semiconductor Corporation
Document #: 001-06434 Rev. **
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised February 1, 2006
1CY7C1041BNV33
Features
High speed
— t
AA
= 12 ns
Low active power
— 612 mW (max.)
Low CMOS standby power (Commercial L version)
— 1.8 mW (max.)
2.0V Data Retention (660
μ
W at 2.0V retention)
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
The CY7C1041BNV33 is a high-performance CMOS Static
RAM organized as 262,144 words by 16 bits.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
17
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
17
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O
0
through I/O
15
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1041BNV33 is available in a standard 44-pin
400-mil-wide body width SOJ and 44-pin TSOP II package
with center power and ground (revolutionary) pinout.
1
A
1
A
Logic Block Diagram
Pin Configuration
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
INPUT BUFFER
256K x 16
ARRAY
1024 x 4096
A
0
A
1
A
1
A
1
A
1
A
1
A
9
A
1
I/O
0
– I/O
7
BLE
I/O
8
– I/O
15
OE
WE
Top View
SOJ
TSOP II
WE
A
5
A
6
A
7
A
8
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
31
30
32
36
35
34
33
37
40
39
38
41
44
43
42
16
17
29
28
V
CC
V
SS
I/O
4
I/O
5
A
0
A
1
A
2
A
3
A
4
OE
BHE
BLE
V
SS
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
NC
A
17
A
16
A
15
I/O
15
I/O
14
I/O
13
I/O
12
CE
I/O
0
I/O
1
I/O
2
I/O
3
18
19
20
21
27
26
25
24
22
23
I/O
6
I/O
7
A
14
A
13
A
12
A
11
A
10
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CY7C1041BNV33L-15ZXCT 功能描述:IC SRAM 4MBIT 15NS 44TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2
CY7C1041BV33-12VC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 12ns 44-Pin SOJ 制造商:Rochester Electronics LLC 功能描述:4MB (256K X 16)- FAST ASYNCH SRAM - Bulk
CY7C1041BV33-12VCT 制造商:Rochester Electronics LLC 功能描述:4MB (256K X 16)- FAST ASYNCH SRAM - Bulk
CY7C1041BV33-15VC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 15ns 44-Pin SOJ 制造商:Rochester Electronics LLC 功能描述:4MB (256K X 16)- FAST ASYNCH SRAM - Bulk
CY7C1041BV33-15VCT 制造商:Rochester Electronics LLC 功能描述:4MB (256K X 16)- FAST ASYNCH SRAM - Tape and Reel
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