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參數(shù)資料
| 型號(hào)： | CY7C09169AV |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 3.3V 16K x 9 Synchronous Dual-Port Static RAM(3.3V 16K x 9 同步雙端口靜態(tài)RAM) |
| 中文描述： | 3.3 16K的× 9同步雙端口靜態(tài)RAM（3.3 16K的× 9同步雙端口靜態(tài)RAM）的 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 318K |
| 代理商： | CY7C09169AV |
CY7C09159AV
CY7C09169AV
PRELIMINARY
4
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................
–
65
°
C to +150
°
C
Ambient Temperature with Power Applied ..
–
55
°
C to +125
°
C
Supply Voltage to Ground Potential...............
–
0.5V to +4.6V
DC Voltage Applied to
Outputs in High Z State ...........................
–
0.5V to V
CC
+0.5V
DC Input Voltage......................................
–
0.5V to V
CC
+0.5V
Output Current into Outputs (LOW) .............................20 mA
Static Discharge Voltage ...........................................>2001V
Latch-Up Current..................................................... >200 mA
Note:
5.
Industrial parts are available in CY7C09169AV only.
Pin Definitions
Left Port
A
0L
–
A
13L
ADS
L
Right Port
A
0R
–
A
13R
ADS
R
Description
Address Inputs (A
0
A
12
for 8K; A
0
A
13
for 16K devices).
Address Strobe Input. Used as an address qualifier. This signal should be asserted LOW during
normal read or write transactions. Asserting this signal LOW also loads the burst address counter
with data present on the I/O pins.
Chip Enable Input. To select either the left or right port, both CE
0
AND CE
1
must be asserted to
their active states (CE
0
≤
V
IL
and CE
1
≥
V
IH
).
Clock Signal. This input can be free-running or strobed. Maximum clock input rate is f
MAX.
Counter Enable Input. Asserting this signal LOW increments the burst address counter of its
respective port on each rising edge of CLK. CNTEN is disabled if ADS or CNTRST are asserted
LOW.
Counter Reset Input. Asserting this signal LOW resets the burst address counter of its respective
port to zero. CNTRST is not disabled by asserting ADS or CNTEN.
Data Bus Input/Output (I/O
0
–
I/O
7
for x8 devices; I/O
0
–
I/O
8
for x9 devices).
Output Enable Input. This signal must be asserted LOW to enable the I/O data pins during read
operations.
Read/Write Enable Input. This signal is asserted LOW to write to the dual-port memory array.
For read operations, assert this pin HIGH.
Flow-Through/Pipelined Select Input. For flow-through mode operation, assert this pin LOW. For
pipelined mode operation, assert this pin HIGH.
Ground Input.
No Connect.
Power Input.
CE
0L
,CE
1L
CE
0R
,CE
1R
CLK
L
CNTEN
L
CLK
R
CNTEN
R
CNTRST
L
CNTRST
R
I/O
0L
–
I/O
8L
OE
L
I/O
0R
–
I/O
8R
OE
R
R/W
L
R/W
R
FT/PIPE
L
FT/PIPE
R
GND
NC
V
CC
Operating Range
Range
Ambient
Temperature
0
°
C to +70
°
C
–
40
°
C to +85
°
C
V
CC
Commercial
Industrial
[5]
3.3V
±
300 mV
3.3V
±
300 mV
Shaded areas contain advance information.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C09159A | 8K x 9 Synchronous Dual-Port Static RAM(8K x 9 同步雙端口靜態(tài)RAM) |
| CY7C09169A | 16K x 9 Synchronous Dual-Port Static RAM(16K x 9 同步雙端口靜態(tài)RAM) |
| CY7C09159V | 3.3V 8K x 9 Synchronous Dual-Port Static RAM(3.3V 8K x 9 同步雙端口靜態(tài)RAM) |
| CY7C09169V | 3.3V 16K x 9 Synchronous Dual-Port Static RAM(3.3V 16K x 9 同步雙端口靜態(tài)RAM) |
| CY7C09159 | 8K x 9 Synchronous Dual-Port Static RAM(8K x 9 同步雙端口靜態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C09169AV-12AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C09169AV-12AI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C09169AV-12AXC | 功能描述:IC SRAM 144KBIT 12NS 100LQFP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C09169AV-12AXI | 功能描述:IC SRAM 144KBIT 12NS 100LQFP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C09179V-12AC | 功能描述:IC SRAM 288KBIT 12NS 100LQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
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