參數(shù)資料
型號(hào)： CY7C0852V-167BBC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： DRAM
英文描述： FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
中文描述： 128K X 36 DUAL-PORT SRAM, 4 ns, PBGA172
封裝： 15 X 15 MM, 1.25 MM HEIGHT, 1 MM PITCH, FBGA-172
文件頁(yè)數(shù)： 18/29頁(yè)
文件大?。?/td> 764K
代理商： CY7C0852V-167BBC
CY7C0850V/CY7C0851V
CY7C0852V/CY7C0853V
Document #: 38-06070 Rev. *D
Page 18 of 29
Bank Select Read
[26, 27]
Read-to-Write-to-Read (OE = LOW)
[25, 28, 29, 30, 31]
Notes:
26. In this depth-expansion example, B1 represents Bank #1 and B2 is Bank #2; each bank consists of one Cypress CY7C0851V/CY7C0852V device from this data
sheet. ADDRESS
(B1)
= ADDRESS
(B2)
.
27. ADS = CNTEN= B0 – B3 = OE = LOW; MRST = CNTRST = CNT/MSK = HIGH.
28. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
29. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
30.
CE
0
= OE = B0 – B3 = LOW; CE
1
= R/W = CNTRST = MRST = HIGH.
31. CE
= B0 – B3 = R/W = LOW; CE
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be
completed (labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
Switching Waveforms
(continued)
Q
3
Q
1
Q
0
Q
2
A
0
A
1
A
2
A
3
A
4
A
5
Q
4
A
0
A
1
A
2
A
3
A
4
A
5
t
SA
t
HA
t
SC
t
HC
t
SA
t
HA
t
SC
t
HC
t
SC
t
HC
t
SC
t
HC
t
CKHZ
t
DC
t
DC
t
CD2
t
CKLZ
t
CD2
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CH2
t
CL2
t
CYC2
CLK
ADDRESS
(B1)
CE
(B1)
DATA
OUT(B2)
DATA
OUT(B1)
ADDRESS
(B2)
CE
(B2)
t
CYC2
t
CL2
t
CH2
t
HC
t
SC
t
HW
t
SW
t
HA
t
SA
t
HW
t
SW
t
CD2
t
CKHZ
t
SD
t
HD
t
CKLZ
READ
t
CD2
NO
OPERATION
WRITE
READ
CLK
CE
R/W
ADDRESS
DATA
IN
DATA
OUT
A
n
A
n+1
A
n+2
A
n+2
D
n+2
A
n+3
A
n+4
Q
n
Q
n+3
相關(guān)PDF資料
PDF描述
CY7C0853V-100BBC FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0853V-100BBI FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C09159AV 3.3V 8K x 9 Synchronous Dual-Port Static RAM(3.3V 8K x 9 同步雙端口靜態(tài)RAM)
CY7C09169AV 3.3V 16K x 9 Synchronous Dual-Port Static RAM(3.3V 16K x 9 同步雙端口靜態(tài)RAM)
CY7C09159A 8K x 9 Synchronous Dual-Port Static RAM(8K x 9 同步雙端口靜態(tài)RAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C0853AV-100BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 100MHz 9Mb SYNC DUAL PORT RAM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C0853AV-100BBI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 9MB (256Kx36) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C0853AV-133BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 133MHz 9Mb SYNC DUAL PORT RAM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C0853AV-133BBI 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 9MBIT 256KX36 4.7NS 172FBGA - Trays
CY7C0853V-100BBC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 9MB (256Kx36) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*