- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379052 > CY7C0851V (Cypress Semiconductor Corp.) FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM(FLEx36TM 3.3V 32K/64K/128K/256K x 36同步雙端口RAM) PDF資料下載
參數(shù)資料
| 型號： | CY7C0851V |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM(FLEx36TM 3.3V 32K/64K/128K/256K x 36同步雙端口RAM) |
| 中文描述： | FLEx36TM 3.3 32K/64K/128K/256K × 36同步雙口RAM（FLEx36TM 3.3 32K/64K/128K/256K × 36同步雙端口RAM）的 |
| 文件頁數(shù)： | 18/29頁 |
| 文件大?。?/td> | 764K |
| 代理商： | CY7C0851V |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
CY7C0850AV/CY7C0851AV
CY7C0852AV/CY7C0853AV
Document #: 38-06070 Rev. *E
Page 18 of 29
Bank Select Read
[26, 27]
Read-to-Write-to-Read (OE = LOW)
[25, 28, 29, 30, 31]
Notes:
26. In this depth-expansion example, B1 represents Bank #1 and B2 is Bank #2; each bank consists of one Cypress CY7C0851AV/CY7C0852AV device from this
data sheet. ADDRESS
(B1)
= ADDRESS
(B2)
.
27. ADS = CNTEN= B0 – B3 = OE = LOW; MRST = CNTRST = CNT/MSK = HIGH.
28. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
29. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
30.
CE
0
= OE = B0 – B3 = LOW; CE
1
= R/W = CNTRST = MRST = HIGH.
31. CE
= B0 – B3 = R/W = LOW; CE
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be
completed (labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
Switching Waveforms
(continued)
Q
3
Q
1
Q
0
Q
2
A
0
A
1
A
2
A
3
A
4
A
5
Q
4
A
0
A
1
A
2
A
3
A
4
A
5
t
SA
t
HA
t
SC
t
HC
t
SA
t
HA
t
SC
t
HC
t
SC
t
HC
t
SC
t
HC
t
CKHZ
t
DC
t
DC
t
CD2
t
CKLZ
t
CD2
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CKHZ
t
CKLZ
t
CD2
t
CH2
t
CL2
t
CYC2
CLK
ADDRESS
(B1)
CE
(B1)
DATA
OUT(B2)
DATA
OUT(B1)
ADDRESS
(B2)
CE
(B2)
t
CYC2
t
CL2
t
CH2
t
HC
t
SC
t
HW
t
SW
t
HA
t
SA
t
HW
t
SW
t
CD2
t
CKHZ
t
SD
t
HD
t
CKLZ
READ
t
CD2
NO
OPERATION
WRITE
READ
CLK
CE
R/W
ADDRESS
DATA
IN
DATA
OUT
A
n
A
n+1
A
n+2
A
n+2
D
n+2
A
n+3
A
n+4
Q
n
Q
n+3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C0852V | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-133AC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-133AI | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-133BBC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C0851V-133AC | 制造商:Rochester Electronics LLC 功能描述:64K X 36 SYNC DPSRAM - Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY7C0851V-133AXC | 功能描述:IC SRAM 2MBIT 133MHZ 176LQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C0851V-133AXCT | 功能描述:IC SRAM 2MBIT 133MHZ 176LQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C0851V-133BBC | 制造商:Rochester Electronics LLC 功能描述:64K X 36 SYNC DPSRAM - Bulk 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 2.25M-Bit 64K x 36 4.4ns 172-Pin FBGA |
| CY7C0851V-133BBI | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:64K X 36 SYNC DPSRAM INDUSTRAIL TEMP - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。