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參數(shù)資料
| 型號(hào)： | CY7C0851V-167BBC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 64K X 36 DUAL-PORT SRAM, 4 ns, PBGA172 |
| 封裝： | 15 X 15 MM, 1.25 MM HEIGHT, 1 MM PITCH, FBGA-172 |
| 文件頁數(shù)： | 25/29頁 |
| 文件大?。?/td> | 764K |
| 代理商： | CY7C0851V-167BBC |
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CY7C0850V/CY7C0851V
CY7C0852V/CY7C0853V
Document #: 38-06070 Rev. *D
Page 25 of 29
MailBox Interrupt Timing
[46, 47, 48, 49, 50]
Switching Waveforms
(continued)
t
CH2
t
CL2
t
CYC2
CLK
L
t
CH2
t
CL2
t
CYC2
CLK
R
3FFFF
t
SA
t
HA
A
n+3
A
n
A
n+1
A
n+2
L_PORT
ADDRESS
A
m
A
m+4
A
m+1
3FFFF
A
m+3
R_PORT
ADDRESS
INT
R
t
SA
t
HA
t
SINT
t
RINT
Table 7. Read/Write and Enable Operation
(Any Port)
[1, 8, 51, 52]
Inputs
CE
0
Outputs
DQ
0
–
DQ
35
High-Z
Operation
OE
X
CLK
CE
1
X
R/W
X
H
Deselected
X
X
L
X
High-Z
Deselected
X
L
H
L
D
IN
Write
L
L
H
H
D
OUT
Read
H
X
L
H
X
High-Z
Outputs Disabled
Notes:
46. CE
= OE = ADS = CNTEN = LOW; CE
= CNTRST = MRST = CNT/MSK = HIGH.
47. Address “3FFFF” is the mailbox location for R_Port of a 9M device.
48. L_Port is configured for Write operation, and R_Port is configured for Read operation.
49. At least one byte enable (B0 – B3) is required to be active during interrupt operations.
50. Interrupt flag is set with respect to the rising edge of the Write clock, and is reset with respect to the rising edge of the Read clock.
51. OE is an asynchronous input signal.
52. When CE changes state, deselection and Read happen after one cycle of latency.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C0853V-133BBC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0853V-133BBI | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0853V | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0852V-133AC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0852V-133AI | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C0852AV-133AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 4.5MBIT 128KX36 4.7NS 176TQFP - Trays |
| CY7C0852AV-133ACT | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 4.5MBIT 128KX36 4.7NS 176TQFP - Tape and Reel |
| CY7C0852AV-133AI | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 4.5MBIT 128KX36 4NS 176TQFP - Bulk |
| CY7C0852AV-133AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4MB (128Kx36) 3.3v 133MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C0852AV-133AXCT | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 4.5MBIT 128KX36 4.4NS 176TQFP - Tape and Reel |
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