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參數(shù)資料
| 型號： | CY7C0850V-133BBC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| 中文描述： | 32K X 36 DUAL-PORT SRAM, 4.4 ns, PBGA172 |
| 封裝： | 15 X 15 MM, 1.25 MM HEIGHT, 1 MM PITCH, FBGA-172 |
| 文件頁數(shù)： | 14/29頁 |
| 文件大?。?/td> | 764K |
| 代理商： | CY7C0850V-133BBC |
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CY7C0850V/CY7C0851V
CY7C0852V/CY7C0853V
Document #: 38-06070 Rev. *D
Page 14 of 29
AC Test Load and Waveforms
Switching Characteristics
Over the Operating Range
Parameter
Description
-167
-133
-100
Unit
CY7C0850V
CY7C0851V
CY7C0852V
Min.
CY7C0850V
CY7C0851V
CY7C0852V
Min.
CY7C0853V
CY7C0853V
Max.
167
Max.
133
Min.
Max.
133
Min.
Max.
100
f
MAX2
t
CYC2
t
CH2
t
CL2
t
R[19]
t
F[19]
t
SA
t
HA
t
SB
t
HB
t
SC
t
HC
t
SW
t
HW
t
SD
t
HD
t
SAD
t
HAD
t
SCN
t
HCN
t
SRST
t
HRST
t
SCM
t
HCM
Notes:
19. Except JTAG signals (t
and t
< 10 ns [max.]).
20. This parameter is guaranteed by design, but it is not production tested.
21. Test conditions used are Load 2.
Maximum Operating Frequency
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Clock Rise Time
Clock Fall Time
Address Set-up Time
Address Hold Time
Byte Select Set-up Time
Byte Select Hold Time
Chip Enable Set-up Time
Chip Enable Hold Time
R/W Set-up Time
R/W Hold Time
Input Data Set-up Time
Input Data Hold Time
ADS Set-up Time
ADS Hold Time
CNTEN Set-up Time
CNTEN Hold Time
CNTRST Set-up Time
CNTRST Hold Time
CNT/MSK Set-up Time
CNT/MSK Hold Time
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6.0
2.7
2.7
7.5
3.0
3.0
7.5
3.0
3.0
10.0
4.0
4.0
2.0
2.0
2.0
2.0
2.0
2.0
3.0
3.0
2.3
0.6
2.3
0.6
2.3
0.6
2.3
0.6
2.3
0.6
2.3
0.6
2.3
0.6
2.3
0.6
2.3
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
2.5
0.6
NA
NA
2.5
0.6
2.5
0.6
NA
NA
NA
NA
NA
NA
NA
NA
3.0
0.6
3.0
0.6
NA
NA
3.0
0.6
3.0
0.6
NA
NA
NA
NA
NA
NA
NA
NA
R1 = 590
R2 = 435
C = 5 pF
(b) Three-state Delay (Load 2)
90%
10%
3.0V
Vss
90%
10%
< 2 ns
< 2 ns
ALL INPUT PULSES
3.3V
V
TH
= 1.5V
R = 50
Z
0
= 50
(a) Normal Load (Load 1)
C = 10 pF
OUTPUT
OUTPUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C0850V-133BBI | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-167AC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-167BBC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0851V-133AC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0851V-133AI | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C0850V-133BBI | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 1.125MBIT 32KX36 4NS 172BGA - Bulk |
| CY7C0850V-167AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 1.125MBIT 32KX36 4NS 176TQFP - Bulk |
| CY7C0850V-167BBC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 1.125MBIT 32KX36 4NS 172BGA - Bulk |
| CY7C0851AV-133AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 2.25MBIT 64KX36 4.7NS 176TQFP - Trays |
| CY7C0851AV-133ACT | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 2.25MBIT 64KX36 4.7NS 176TQFP - Tape and Reel |
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