參數(shù)資料
型號(hào)： CY7C0833AV
廠商： Cypress Semiconductor Corp.
英文描述： FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM(FLEx18 3.3V 64K/128K x 36和128K/256K x 18同步雙端口RAM)
中文描述： FLEx18 3.3 64K/128K × 36和128K/256K × 18同步雙口RAM（FLEx18 3.3 64K/128K × 36和128K/256K × 18同步雙端口RAM）的
文件頁數(shù)： 28/28頁
文件大?。?/td> 775K
代理商： CY7C0833AV
CY7C0837AV
CY7C0830AV/CY7C0831AV
CY7C0832AV/CY7C0833AV
Document #: 38-06059 Rev. *Q
Page 28 of 28
Document History Page
Document Title: FLEx18 3.3V 32K/64K/128K/256K/512K x 18 Synchronous Dual-Port RAM
Document Number: 38-06059
Issue
Date
Change
**
111473
11/27/01
DSG
*A
111942
12/21/01
JFU
REV.
ECN NO.
Orig. of
Description of Change
Change from Spec number: 38-01056 to 38-06059
Updated capacitance values
Updated switching parameters and I
SB3
Updated “Read-to-Write-to-Read (OE Controlled)” waveform
Revised static discharge voltage
Revised footnote regarding I
SB3
*B
113741
04/02/02
KRE
Updated I
sb
values
Updated ESD voltage
Corrected 0853 pins L3 and L12
Added discussion of Pause/Restart for JTAG boundary scan
Revised speed offerings for all densities
Power up requirements added to Maximum Ratings Information
Revise t
cd2
, t
OE
, t
OHZ
, t
CKHZ
, t
CKLZ
for the CY7C0853V to 4.7 ns
*C
*D
*E
*F
*G
114704
115336
122307
123636
126053
04/24/02
07/01/02
12/27/02
1/27/03
08/11/03
KRE
KRE
RBI
KRE
SPN
Separated out 4M and 9M data sheets
Updated I
sb
and I
CC
values
Updated I
sb
and I
CC
values
Removed “A particular port can write to a certain location while another port
is reading that location.” from Functional Description.
Removed x36 devices (CY7C0852/CY7C0851) from this datasheet. Added
0.5M, 1M and 9M x18 devices to it. Changed title to FLEx18 3.3V
32K/64K/128K/256K/512K x18 Synchronous Dual-Port RAM. Changed
datasheet to accommodate the removals and additions. Removed general
JTAG description. Updated JTAG ID codes for all devices. Added 144FBGA
package for all devices. Updated selection guide table and moved to the
front page. Updated block diagram to reflect x18 configuration. Added
preliminary status back due to the addition of the new devices.
Minor Change: Correct the revision indicated on the footer.
Updated Marketing part numbers
Updated tRSF
Added Byte Select Operation Table
Removed Preliminary status
Added I
SB5
Changed t
RSCNTINT
to 10ns
Updated Counter reset section to reflect what is loaded into the mirror
register
Corrected Ordering Codes for 0831 devices in the 133 Mhz speed bin.
Added CY7C0833AV-133BBI.
Changed VDDIO to VDD (typo)
Added lead(Pb)-free parts
Corrected typo in DC table
*H
*I
129443
231993
11/03/03
See ECN
RAZ
YDT
*J
231813
See ECN
WWZ
*K
*L
311054
329111
See ECN
See ECN
RYQ
SPN
*M
*N
330561
375198
See ECN
See ECN
RUY
YDT
*O
391525
See ECN
SPN
*P
414109
See ECN
LIJ
*Q
461113
SEE ECN
YDT
相關(guān)PDF資料
PDF描述
CY7C0837AV FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM(FLEx18 3.3V 64K/128K x 36和128K/256K x 18同步雙端口RAM)
CY7C0851V FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM(FLEx36TM 3.3V 32K/64K/128K/256K x 36同步雙端口RAM)
CY7C0852V FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0850V FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0850V-133AC FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C0833AV-100BBC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 9M-Bit 512K x 18 144-Pin FBGA
CY7C0833AV-133BBC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 9M-Bit 512K x 18 4.7ns 144-Pin FBGA 制造商:Rochester Electronics LLC 功能描述:
CY7C0833AV-133BBI 制造商:Cypress Semiconductor 功能描述:
CY7C0833V-100BBC 制造商:Cypress Semiconductor 功能描述:SRAM SYNC DUAL 3.3V 9MBIT 512KX18 5NS 144FBGA - Bulk
CY7C0833V-100BBI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 9MB (512Kx18) 3.3v 100MHz Synch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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