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參數(shù)資料
| 型號(hào)： | CY7C056V-15AXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 3.3V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static |
| 中文描述： | 16K X 36 DUAL-PORT SRAM, 15 ns, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, PLASTIC, TQFP-144 |
| 文件頁(yè)數(shù)： | 3/26頁(yè) |
| 文件大?。?/td> | 713K |
| 代理商： | CY7C056V-15AXC |
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CY7C056V
CY7C057V
Document #: 38-06055 Rev. *E
Page 11 of 26
Data Retention Mode
The CY7C056V and CY7C057V are designed with battery
backup in mind. Data retention voltage and supply current are
guaranteed over temperature. The following rules ensure data
retention:
1. Chip Enable (CE)[23] must be held HIGH during data retention,
within VDD to VDD – 0.2 V.
2. CE must be kept between VDD – 0.2 V and 70% of VDD during
the power-up and power-down transitions.
3. The RAM can begin operation >tRC after VDD reaches the
minimum operating voltage (3.15 volts).
Notes
21. Test conditions used are Load 1.
22. tBDD is a calculated parameter and is the greater of tWDD–tPWE (actual) or tDDD–tSD (actual).
23. CE is LOW when CE0 VIL and CE1 VIH.
24. CE = VDD, Vin = VSS to VDD, TA = 25 C. This parameter is guaranteed but not tested.
Busy Timing[21]
tBHC
BUSY HIGH from CE HIGH
–
12
–
15
ns
tPS
Port set-up for priority
5
–
5
–
ns
tWB
R/W LOW after BUSY (Slave)
0
–
0
–
ns
tWH
R/W HIGH after BUSY HIGH (Slave)
11
–
13
–
ns
tBDD[22]
BUSY HIGH to data valid
–
12
–
15
ns
Interrupt Timing[21]–
tINS
INT set time
–
12
–
15
ns
tINR
INT reset time
–
12
–
15
ns
Semaphore Timing
tSOP
SEM flag update pulse (OE or SEM)10
–
10
–
ns
tSWRD
SEM flag write to read time
5
–
5
–
ns
tSPS
SEM flag contention window
5
–
5
–
ns
tSAA
SEM address access time
–
12
–
15
ns
Switching Characteristics Over the Operating Range[13] (continued)
Parameter
Description
CY7C056V
CY7C057V
Unit
-12
-15
Min
Max
Min
Max
Timing
Parameter
Test Conditions[24]
Max
Unit
ICCDR1
@ VDDDR = 2 V
50
A
Data Retention Mode
3.15 V
VCC 2.0 V
VCC to VCC – 0.2 V
VCC
CE
tRC
V
IH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C057V-12AXC | 3.3V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static |
| CY7C057V-15BBXC | 3.3V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static |
| CY7C057V-15AXI | 3.3V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static |
| CY7C057V-15AXC | 3.3V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static |
| CY7C0832V-167AXC | 256K X 18 DUAL-PORT SRAM, 4 ns, PQFP120 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C056V-15BBC | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:3.3V 16K X 36 ASYNCH FLEX36 DPSRAM - Bulk |
| CY7C057V-12AC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C057V-12ACT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C057V-12AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3V 16Kx36 Aync COM FLEx36 DualPort 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C057V-12AXCT | 功能描述:IC SRAM 1.152MBIT 12NS 144LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2 |
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