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| 型號(hào)： | CY7C006AV-25AC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM |
| 中文描述： | 16K X 8 DUAL-PORT SRAM, 25 ns, PQFP64 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-64 |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大小： | 301K |
| 代理商： | CY7C006AV-25AC |
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CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
Document #: 38-06051 Rev. *A
Page 7 of 20
Switching Characteristics
Over the Operating Range
[15]
Parameter
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE[16]
t
DOE
t
LZOE[17, 18, 19]
t
HZOE[17, 18, 19]
t
LZCE[17, 18, 19]
t
HZCE[17, 18, 19]
t
PU[19]
t
PD[19]
WRITE CYCLE
t
WC
t
SCE[16]
t
AW
t
HA
t
SA[16]
t
PWE
t
SD
t
HD
t
HZWE[18, 19]
t
LZWE[18, 19]
t
WDD[20]
t
DDD[20]
BUSY TIMING
[21]
t
BLA
t
BHA
t
BLC
t
BHC
t
PS
Note:
15. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
/I
and 30-pF load capacitance.
16. To access RAM, CE=L, SEM=H. To access semaphore, CE=H and SEM=L. Either condition must be valid for the entire t
SCE
time.
17. At any given temperature and voltage condition for any given device, t
HZCE
is less than t
LZCE
and t
HZOE
is less than t
LZOE
.
18. Test conditions used are Load 3.
19. This parameter is guaranteed but not tested. For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing
with Busy waveform.
20. For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing with Busy waveform.
21. Test conditions used are Load 2.
Description
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
-20
Min.
Max.
Unit
-25
Min.
Max.
Read Cycle Time
Address to Data Valid
Output Hold From Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE Low to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
20
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
25
3
3
20
12
25
13
3
3
12
15
3
3
12
15
0
0
20
25
Write Cycle Time
CE LOW to Write End
Address Valid to Write End
Address Hold From Write End
Address Set-Up to Write Start
Write Pulse Width
Data Set-Up to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read Data Valid
20
16
16
0
0
16
12
0
25
20
20
0
0
20
15
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
15
3
3
40
30
50
35
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
Port Set-Up for Priority
20
20
20
16
20
20
20
17
ns
ns
ns
ns
ns
5
5
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C006AV-25JC | 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM |
| CY7C1360 | Plastic Connector Backshell; Enclosure Material:Plastic; Enclosure Color:Beige; Features:Compatible with 101XX-6000EC Mini D Ribbon; Leaded Process Compatible:No; No. of Positions:36; Peak Reflow Compatible (260 C):No RoHS Compliant: No |
| CY7C1360B | BACKSHELL, MDR, 36WAY, SCREW; For use with:Mini D Ribbon Connectors; Material:Glass Reinforced Polyester (PBT); Colour:Black; Connector type:Backshell; Flammability rating:UL94V-0; Temp, op. max:85(degree C); Temp, op. min:-20(degree RoHS Compliant: Yes |
| CY7C1360B-225AI | BACKSHELL, MDR, 36WAY, METAL; For use with:Mini D Ribbon 101XX-6000 EC Plug Connectors; Material:Aluminum; Colour:Nickel; Connector type:Backshell; Ways, No. of:36 RoHS Compliant: Yes |
| CY7C1360B-225AJC | BACKSHELL, MDR, 36WAY, METAL; For use with:Mini D Ribbon 101XX-6000 EC Plug Connectors; Material:Aluminum; Colour:Steel; Connector type:Backshell; Ways, No. of:36 RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C006AV-25ACT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 3.3V 128K-Bit 16K x 8 25ns 64-Pin TQFP T/R |
| CY7C006AV-25AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3V 16Kx8 COM Dual Port 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C006AV-25JC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM |
| CY7C007A | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:32K/16K x8, 32K/16K x9 Dual-Port Static RAM |
| CY7C007A-12AC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:32K/16K x8, 32K/16K x9 Dual-Port Static RAM |
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